MAX1761EEE Maxim Integrated Products, MAX1761EEE Datasheet - Page 8

• Manufacturer Part Number: MAX1761EEE
• Description: DC/DC Switching Controllers
• Manufacturer: Maxim Integrated Products

Specifications of MAX1761EEE

• Number Of Outputs: 2
• Output Voltage: 2.5 V, 1 V to 5.5 V, 1.8 V
• Input Voltage: 4.5 V to 20 V
• Mounting Style: SMD/SMT
• Package / Case: QSOP-16
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Small, Dual, High-Efficiency
Buck Controller for Notebooks
8
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PIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
NAME
OUT1
OUT2
ON2
ON1
GND
DH2
CS2
CS1
DH1
FB1
REF
FB2
DL2
DL1
V+
VL
Feed b ack Inp ut for the 2.5V P WM . C onnect FB1 to GN D for a fi xed 2.5V outp ut. C onnect a r esi sti ve
vol tag e- d i vi d er to FB1 to ad j ust OU T1 fr om 1V to 5.5V . FB1 r eg ul ates to 1V ( see Ad j usti ng V
Output Voltage Connection for PWM1. OUT1 senses the output voltage to set the regulator on-time
and is connected internally to a 160kΩ feedback input in fixed-output mode.
2V Reference Voltage Output. Bypass REF to GND with 0.1µF (min) capacitor. Can supply 50µA for
external loads.
When ON1 = High, Normal/Forced PWM Mode Selection and OUT2 On/Off Control Input
LOW (ON2 < 0.5V)
HIGH (2V < ON2 < VL)
Floating
Battery Voltage. V+ is the input for the VL regulator and DH gate drivers and is also used for PWM
one-shot timing.
On/Off Control Input. Drive ON1 high to enable the device. Drive ON1 low to enter micropower
shutdown mode. Both REF and VL are disabled in shutdown. ON1 may be pinstrapped to V+.
Output Voltage Connection for PWM2. OUT2 senses the output voltage to set the regulator on-time
and is connected internally to a 160kΩ feedback input in fixed-output mode.
Feed b ack Inp ut for the 1.8V P WM . C onnect FB2 to GN D for a fi xed 1.8V outp ut. C onnect a r esi sti ve
vol tag e- d i vi d er to FB2 to ad j ust OU T2 fr om 1V to 5.5V . FB2 r eg ul ates to 1V ( see Ad j usti ng V
High-Side Gate Driver Output for PWM2. Swings between GND and V+.
Current-Sense Connection for PWM2. Connect CS2 to the drain of the low-side driver. Alternatively,
connect CS2 to the junction of the source of the low-side FET and a current-sense resistor to GND.
Low-Side Gate Driver Output for PWM2. DL2 swings between GND and VL.
Combined Power and Analog Ground
Linear Regulator Output. VL is the output of the 4.65V internal linear regulator, capable of supplying
25mA for external loads. The VL pin also serves as the supply input for the DL gate driver and the
analog/logic blocks. VL can be overdriven by an external 5V supply to improve efficiency. Bypass
VL to GND with a 4.7µF ceramic capacitor.
Low-Side Gate Driver Output for PWM1. DL1 swings between GND and VL.
Current-Sense Connection for PWM1. Connect CS1 to the drain of the low-side driver. Alternatively,
connect CS1 to the junction of the source of the low-side FET and a current-sense resistor to GND.
High-Side Gate Driver Output for PWM1. DH1 swings between GND and V+.
ON2 CONDITION
OUT1 is enabled in normal mode; OUT2 is shut down.
Both outputs are enabled in normal mode.
Both outputs are enabled in forced-PWM mode.
FUNCTION
MODE SELECTED
Pin Description
OUT
OU T
secti on) .
secti on) .