DP83934AVQB National Semiconductor, DP83934AVQB Datasheet - Page 6

• Manufacturer Part Number: DP83934AVQB
• Description: IC CTRLR ORIENT NETWORK 160PLCC
• Manufacturer: National Semiconductor

Specifications of DP83934AVQB

• Controller Type: Network Interface Controller (NIC)
• Interface: Twisted Pair
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 140mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83934AVQB

NETWORK INTERFACE PINS (Continued)
CD
CD
RX
RX
TX
TX
CRSo
CRSi
COLo
COLi
RXDo
RXDi
EXUSR0
RXCo
RXCi
EXUSR1
Symbol
2 0 Pin Description
b
a
b
a
b
a
Driver
Type
ECL
ECL
TRI
TRI
TP
TP
TP
TP
Direction
O Z
O Z
O
O
O
O
O
O
I
I
I
I
I
I
I
I
(Continued)
AUI COLLISION
be unconnected when an external ENDEC is selected (EXT
AUI COLLISION
be unconnected when an external ENDEC is selected (EXT
AUI RECEIVE
be unconnected when an external ENDEC is selected (EXT
AUI RECEIVE
should be unconnected when an external ENDEC is selected (EXT
AUI TRANSMIT
unconnected when an external ENDEC is selected (EXT
AUI TRANSMIT
be unconnected when an external ENDEC is selected (EXT
CARRIER SENSE OUTPUT (CRSo) from the internal ENDEC (EXT
CRSo signal is internally connected between the ENDEC and MAC units It is asserted on the first
valid high-to-low transition in the receive data (RX
after the last bit of data Although this signal is used internally by the SONIC-T it is also provided
as an output to the user
CARRIER SENSE INPUT (CRSi) from an external ENDEC (EXT
activated high when the external ENDEC detects valid data at its receive inputs
COLLISION OUTPUT (COLo) from the internal ENDEC (EXT
signal is internally connected between the ENDEC and MAC units This signal generates an
active high signal when the 10 MHz collision signal from the transceiver is detected Although this
signal is used internally by the SONIC-T it is also provided as an output to the user
COLLISION DETECT INPUT (COLi) from an external ENDEC (EXT
activated from an external ENDEC when a collision is detected This pin is monitored during
transmissions from the beginning of the Start of Frame Delimiter (SFD) to the end of the packet
At the end of transmission this signal is monitored by the SONIC-T for CD heartbeat
This pin will be TRI-STATE until the DCR has been written to (See Section 6 3 2
EXBUS for more information )
RECEIVE DATA OUTPUT (RXDo) from the internal ENDEC (EXT
EXT
signal must be sampled on the rising edge of the receive clock output (RXCo) Although this
signal is used internally by the SONIC-T it is also provided as an output to the user
RECEIVE DATA INPUT (RXDi) from an external ENDEC (EXT
from the external ENDEC This data is clocked in on the rising edge of RXCi
EXTENDED USER OUTPUT (EXUSR0) When EXBUS has been set (see Section 6 3 2) this pin
becomes a programmable output It will remain TRI-STATE until the SONIC-T becomes a bus
master at which time it will be driven according to the value programmed in the DCR2 (see
Section 6 3 7)
This pin will be TRI-STATE until the DCR has been written to (See Section 6 3 2
EXBUS for more information )
RECEIVE CLOCK OUTPUT (RXCo) from the internal ENDEC (EXT
RXCo signal is internally connected between the ENDEC and MAC units This signal is the
receive clock that is derived from the Manchester data stream It remains active 5-bit times after
the deassertion of CRSo Although this signal is used internally by the SONIC-T it is also provided
as an output to the user
RECEIVE CLOCK INPUT (RXCi) from an external ENDEC (EXT
derived from the Manchester data stream This signal is generated from an external ENDEC
EXTENDED USER OUTPUT (EXUSR1) When EXBUS has been set (see Section 6 3 2) this pin
becomes a programmable output It will remain TRI-STATE until the SONIC-T becomes a bus
master at which time it will be driven according to the value programmed in the DCR2 (see
Section 6 3 7)
e
0 the RXDo signal is internally connected between the ENDEC and MAC units This
TABLE 2-1 Pin Description (Continued)
a
b
a
b
a
b
The positive differential receive data input from the transceiver This pin should
The negative differential receive data input from the transceiver This pin
The negative differential transmit output to the transceiver This pin should
The positive differential transmit output to the transceiver This pin should be
The positive differential collision input from the transceiver This pin should
The negative differential collision input from the transceiver This pin should
6
Description
g
) This signal remains active 1 5 bit times
e
1)
e
e
e
e
e
1)
1)
1)
1)
e
e
0) When EXT
e
1) The NRZ data decoded
e
e
1) The CRSi signal is
1) The receive clock that is
e
e
e
0) NRZ data output When
1)
0) When EXT
0) When EXT
1) The COLi signal is
e
0 the COLo
e
e
0 the
0 the