DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 44

• Manufacturer Part Number: DP83953VUL
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83953VUL

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 870mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83953VUL

6.0 Port Block Functions
The RIC2A has 13 port logic blocks (one for each network
connection). In addition to the packet repetition operations
already described, the port block performs two other func-
tions:
1. the physical connection to the network segment (trans-
2. it provides a means to protect the network from malfunc-
Each port has its own status register. This register allows
the user to determine the current status of the port and
configure a number of port specific functions.
6.1 Transceiver Functions
The RIC2A may connect to network segments in two ways:
1. over AUI cable to transceiver boxes,
2. to twisted pair cable via a simple interface.
The first method is only supported by RIC2A port 1 (the
AUI port). Twisted pair cable connection, (2), is only sup-
ported on ports 2 to 13.
Pre-emphasis resistor network/filters and per port buffer/driver are all integrated in the RIC2A.
Where C = 0.01 F, C1 = 1.0 nF, R2 = 49.9 , and R1 =10 . All values are typical and
ceiver function).
tioning segments (segment partition).
Figure 16. Port Connection to a 10BASE-T Segment
44
10BASE-T Transceiver Operation
The RIC2A contains virtually all of the digital and analog
circuitry required for connection to 10BASE-T network seg-
ments. The RIC2A design even integrates transmit filters.
The Figure 16 shows the connection for a RIC2A port to a
10BASE-T segment
The operation of the 10BASE-T transceiver's logical func-
tions may be modified by software control. The default
operation allows the transceivers to transmit and expect
reception of link pulses. If the designer writes a logical one
to the GDLNK bit of a port's status register, the default
mode may be modified. The port's transceiver will operate
normally but will not transmit link pulses or monitor their
reception. Therefore, a link fail state and the associated
modification of transceiver operation will not occur.
The on-chip 10BASE-T transceivers automatically detects
and correct the polarity of the received data stream. This
polarity detection scheme relies upon the polarity of the
received link pulses and the end of packet waveform. Polar-
ity detection and correction may be disabled by software
control.
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