DP83953VUL National Semiconductor, DP83953VUL Datasheet - Page 60

• Manufacturer Part Number: DP83953VUL
• Description: IC CTRLR RIC REPEATER 160-PQFP
• Manufacturer: National Semiconductor

Specifications of DP83953VUL

• Controller Type: Ethernet Repeater Interface Controller
• Interface: IEEE 802.3
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 870mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 160-MQFP, 160-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83953VUL

7.0 RIC2A Registers
Page Select Register ((All pages) Address 10H)
The Page Select register performs two functions:
1. It enables switches to be made between register pages,
2. It provides status information regarding the Event Logging Interrupts.
Device Type Register (Page 0H Address 11H)
This register may be used to distinguish different revisions of RIC. It will return the value 91 H for the DP83953 RIC2A
device. It will return the value 8X
operations to this register have no effect upon the contents.
Lower Event Count Mask Register (Page 0H Address 12H)
Note: 1 = enable, 0 = disable
D(3:0)
D4
D5
D6
D7
Bit
D0
D1
D2
D3
D4
D5
D6
D7
bit
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
BDLNKC
D7
D7
FC
D7
1
PSEL(3:0)
FF
LC
HC
FC
BDLNKC
ELBERC
Symbol
Symbol
NSFDC
PLERC
PARTC
RECC
JABC
SEC
PARTC
HC
D6
D6
D6
(Continued)
0
H
for the DP83952 RICII device, or the value 0X
Jabber Count Enable: Enables recording of Jabber Protect events.
Elasticity Buffer Error Count Enable: Enables recording of Elasticity Buffer Error
events.
Phase Lock Error Count Enable: Enables recording of Carrier Error events.
Non SFD Count Enable: Enables recording of Non SFD packet events.
Short Event Count Enable: Enables recording of Short events.
Receive Count Enable: Enables recording of Packet Receive (port N status)
events that do not suffer collisions.
Partition Count Enable: Enables recording of Partition events.
Bad Link Count Enable: Enables recording of Bad Link events.
Page Select Bits: When read these bits indicate the currently selected Upper
Register Array Page. Write cycles to these locations facilitates page swapping. The
page select bits are latched on the rising edge of the read strobe.
Flag Found: This indicates one of the unmasked event recording latches has been
set.
Low Count: This indicates one of the port event counters has a value less than
00FF Hex.
High Count: This indicates one of the port event counters has a value greater than
C000 Hex.
Full Counter: This indicates one of the port event counters has a value equal to
FFFF Hex.
D5
LC
D5
RECC
0
D5
D4
FF
D4
1
SEC
D4
60
PSEL3
D3
D3
0
NSFDC
D3
Description
Description
PSEL2
D2
D2
0
PLERC
D2
H
PSEL1
for the DP83950 RIC device. Write
D1
D1
X
ELBERC
D1
PSEL0
D0
D0
X
JABC
D0
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