MAX1889ETE Maxim Integrated Products, MAX1889ETE Datasheet - Page 23

• Manufacturer Part Number: MAX1889ETE
• Description: DC/DC Switching Converters
• Manufacturer: Maxim Integrated Products

Specifications of MAX1889ETE

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

To avoid excessive voltage coupling, a small capacitor
can be added in parallel with the base resistor. The
resulting RC time constant should be between 5µs to
50µs.
The MAX1889 linear-regulator controllers use an inter-
nal transconductance amplifier to drive an external
pass transistor. The transconductance amplifier, the
pass transistor, the base-emitter resistor, and the out-
put capacitor determine the loop stability. If the output
capacitor and pass transistor are not properly selected,
the linear regulator can be unstable.
The transconductance amplifier regulates the output
voltage by controlling the pass transistor’s base cur-
rent. The total DC loop gain is approximately:
where V
current through the base-to-emitter resistor (R
bias resistor is typically 3kΩ, providing 0.23mA of cur-
rent, biasing the LDO near its regulation voltage setpoint.
The output capacitor and the load resistance create the
dominant pole in the system. The pass transistor’s input
capacitance creates a second pole in the system.
Additionally, the output capacitor’s ESR generates a zero.
To achieve stable operation, use the following equations
to verify that the linear regulator is properly compensated:
1) First, determine the dominant pole set by the linear
2) Next, determine the second pole set by the base-
______________________________________________________________________________________________________
regulator’s output capacitor and the load resistor:
The unity gain crossover of the linear regulator is:
to-emitter capacitance (including the transistor’s
input capacitance), the transistor’s input resistance,
and the base-to-emitter pullup resistor:
f
POLE CLDO
T
A
f
is 26mV at room temperature, and I
(
CROSSOVER
V LDO
f
(
POLE CBE
)
)
=
(
=
2



π
5 5
V
C
)
.
T
= A
=
=
LDO LOAD



2
R




2
1
1
V(LDO)
π
BE LOAD
π
+
R
C
Triple-Output TFT LCD Power Supply
C



I
BE
BE BE T FE
I
BIAS FE
Stability Requirements
I
LOAD
(
R
R
f
1
POLE(CLDO)
BE
h
=
+
V h
2
II R
V h
I
π
LOAD MAX
T FE



C
IN




LDO LDO
V
)
REF
(
BIAS
V
BE
)
). This
is the
3) A third pole is set by the linear regulator’s feedback
4) If the second and third poles occur well after unity-
However, if the ESR zero occurs before the unity-gain
crossover, cancel the zero with the feedback pole by
changing circuit components such that:
For most applications where ceramic capacitors are
used, the ESR zero always occurs after the crossover.
A capacitor connected between the output and the
feedback node improves the transient response,
reduces the noise coupled into the feedback loop, and
maintains the correct regulation point (Figure 8).
Typically, more output capacitance provides the best
solution, since this also reduces the output voltage drop
immediately after a load transient. Connect at least a
0.1µF capacitor between the linear regulator’s output and
ground, as close to the external pass transistor as possi-
ble. Depending on the selected pass transistor, larger
capacitor values may be required for stability (see the
Stability Requirements section). Furthermore, the output
capacitor’s ESR affects stability. Use output capacitors
with an ESR less than 200mΩ to ensure stability and opti-
mum transient response. Once the minimum capacitor
value for stability is determined, verify that the linear regu-
lator’s output does not contain excessive noise. Although
adequate for stability, small capacitor values can provide
too much bandwidth, making the linear regulator sensitive
to noise. Larger capacitor values reduce the bandwidth,
thereby reducing the regulator’s noise sensitivity. If noise
on the ground reference causes the design to be margin-
ally stable for the negative linear regulator, bypass the
negative output back to its reference voltage. This tech-
nique reduces the differential noise on the output.
resistance and the capacitance (including stray
capacitance) between FB_ and GND (for the posi-
tive LDO) and FBN and GND (for the negative LDO)
(Figure 8):
gain crossover, the linear regulator remains stable:
with Fault Protection
f
f
f
POLE FB POS
POLE FB NEG
POLE CBE
f
POLE FB
(
(
(
)_
)_
(
)
> 2
)
f
≈
POLE CLDO
=
=
2π
Output Capacitor Selection
2
2
π
π
C
C
C
(
OUT ESR
FB
FB
1
(
(
R
R II R
R II R
1
1
12
)
9
A
V LDO
(
10
13
)
)
)
23