S-875255CUP-AHB-T2 Seiko Instruments, S-875255CUP-AHB-T2 Datasheet - Page 27

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S-875255CUP-AHB-T2

Manufacturer Part Number
S-875255CUP-AHB-T2
Description
Linear Regulators - Standard 5.2V with 5.5V Detec
Manufacturer
Seiko Instruments

Specifications of S-875255CUP-AHB-T2

Polarity
Positive
Number Of Outputs
1
Output Type
Fixed
Output Voltage
5.2 V
Output Current
0.6 mA
Line Regulation
50 mV
Load Regulation
50 mV
Input Voltage Max
24 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Package / Case
SOT-89-5
Maximum Power Dissipation
1000 mW
Mounting Style
SMD/SMT
Output Voltage Tolerance
+/- 2.4 %
Voltage Regulation Accuracy
2.4 %
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S-875255CUP-AHB-T2
Manufacturer:
JST
Quantity:
306
Company:
Part Number:
S-875255CUP-AHB-T2
Quantity:
2 000
Rev.6.1
4. Delay circuit
The delay circuit outputs voltage detector output (V
release voltage (+V
In Figure 21, when V
output (V
under the detection voltage (−V
capacitor (C
without delay.
The external capacitor (C
Its delay time (t
t
Caution 1. Unless an output delay is needed, keep CD pin open. Do not apply external voltage
pd
HIGH WITHSTAND-VOLTAGE VOLTAGE REGULATOR WITH RESET FUNCTION
(ms)=Delay coefficient (3.18 min., 5.74 typ., 8.73 max.)×C
_10
OR
2. When designing your printed-circuit board layout, take care that no leakage current
) changes from low to high level, providing delay output. When the voltage at VIN pin falls
D
other than ground potential to CD pin, which may cause IC breakdown.
flows to the external capacitor (C
obtained. Because the value of the constant current source (I
impedance is high.
) is rapidly discharged and the voltage detector output (V
pd
) is expressed by the following equation:
DET
cd
) at the rising of VIN pin.
exceeds the reference voltage (V
D
) is charged with constant current, and is practically independent of V
DET
N2
), the N2 transistor turns ON, therefore the charge of the external
Seiko Instruments Inc.
CD
V
C
Figure 21
cd
D
I
C
D
OR
), otherwise the correct delay time may not be
) with delay after the voltage at V
V
ref
+
ref
), the output voltage pin detection voltage
D
(nF)
VOR
OR
) changes from high to low level
C
) is only 195 nA, C
IN
pin has become
S-87x Series
IN
voltage.
D
27
to

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