LTC1685CS8#PBF Linear Technology, LTC1685CS8#PBF Datasheet - Page 10

IC TXRX RS485 PREC DELAY 8-SOIC

LTC1685CS8#PBF

Manufacturer Part Number
LTC1685CS8#PBF
Description
IC TXRX RS485 PREC DELAY 8-SOIC
Manufacturer
Linear Technology
Type
Transceiverr
Datasheet

Specifications of LTC1685CS8#PBF

Number Of Drivers/receivers
1/1
Protocol
RS422, RS485
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIONS
LTC1685
Very inexpensive unshielded telephone grade twisted pair
is shown in Figure 13. In spite of the noticeable loss at the
receiver input, the LTC1685 can still transfer 30Mbps at
100ft of telephone grade UTP. Note that under all these
conditions, the LTC1685 can pass through a single data
pulse equal to the inverse of the data rate (e.g., 20ns for
50Mbps data rate).
Even at distances of 4000ft, 1Mbps data rates are possible
using the LTC1685 and category 5 UTP. Figure 14a shows
a 1 s pulse propagated down 4000ft of category 5 UTP.
Notice both the DC and the AC losses at the receiver input.
The DC attenuation is due to the parasitic resistance of the
cable. Figure 14b shows a 1Mbps square wave over
4000ft. To transmit at this speed but using longer cable
lengths, see the LTC1686/LTC1687 high speed RS485
full-duplex transceivers.
10
Figure 13. 100ft of Telephone Grade UTP: 30Mbps
2V/DIV
2V/DIV
2V/DIV
2V/DIV
2V/DIV
Figure 12. 1000ft of Category 5 UTP: 4Mbps
U
INFORMATION
100ns/DIV
20ns/DIV
U
W
1685 F13
1685 F12
DRIVER INPUT
DIFFERENTIAL
RECEIVER
INPUT
RECEIVER
OUTPUT
RECEIVER
OUTPUT
DRIVER
INPUT
U
High Speed Backplane Transmission
The LTC1685 can also be used in backplane point-to-point
transceiver applications, where the user wants to assure
operation even when the common mode goes above or
below the rails. It is advisable to terminate the PC traces
when approaching maximum speeds. Since the LTC1685
is not intended to drive parallel terminated cables with
characteristic impedances much less than that of twisted
pair, both ends of the PC trace must be series terminated
with the characteristic impedance of the trace. For best
results, the signal should be routed differentially. The true
and complement outputs of the LTC1685 should be routed
on adjacent layers of the PC board. The two traces should
be routed very symmetrically, minimizing and equalizing
parasitics to nearby signal and power/ground layers. For
single-ended transmission, route the series terminated
Figure 14b. 4000ft of Category 5 UTP: 1Mbps Square Wave
Figure 14a. 4000ft of Category 5 UTP: 1 s Pulse
2V/DIV
1V/DIV
5V/DIV
2V/DIV
5V/DIV
CABLE DELAY
1 s/DIV
1 s/DIV
1685 F14a
1685 F14b
DRIVER
INPUT
RECEIVER
INPUT
RECEIVER
OUTPUT
RECEIVER
OUTPUT
DRIVER
INPUT

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