ADM3488EARZ Analog Devices Inc, ADM3488EARZ Datasheet - Page 8

IC TXRX ESD RS-485 3.3V 8-SOIC

ADM3488EARZ

Manufacturer Part Number
ADM3488EARZ
Description
IC TXRX ESD RS-485 3.3V 8-SOIC
Manufacturer
Analog Devices Inc
Type
Transceiverr
Datasheet

Specifications of ADM3488EARZ

Number Of Drivers/receivers
1/1
Protocol
RS422, RS485
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Device Type
Differential
No. Of Drivers
1
Supply Voltage Range
3V To 3.6V
Driver Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Interface Type
RS422, RS485
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADM3488EARZ
Manufacturer:
ADI
Quantity:
12 000
Part Number:
ADM3488EARZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
ADM3483E/ADM3486E/ADM3488E/ADM3490E/ADM3491E
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
ADM3483E/
ADM3486E
Pin No.
1
2
3
4
5
N/A
6
N/A
N/A
7
N/A
8
N/A
Figure 4. ADM3483E/ADM3486E
RO
RE
DE
DI
1
2
3
4
Pin Configuration
ADM3483E/
ADM3486E
(Not to Scale)
TOP VIEW
ADM3488E/
ADM3490E
Pin No.
2
N/A
N/A
3
4
5
N/A
8
6
N/A
7
1
N/A
8
7
6
5
V
B
A
GND
CC
ADM3491E
Pin No.
2
3
4
5
6, 7
9
N/A
12
10
N/A
11
13, 14
1, 8
Mnemonic
RO
RE
DE
DI
GND
Y
A
A
Z
B
B
V
NC
CC
Figure 5. ADM3488E/ADM3490E
GND
V
RO
CC
DI
1
2
3
4
Rev. A | Page 8 of 20
Pin Configuration
(Not to Scale)
ADM3488E/
ADM3490E
Description
Receiver Output. If A > B by 200 mV, RO is high; if A < B by 200 mV,
RO is low.
Receiver Output Enable. A low level enables the receiver output. A high
level places it in a high impedance state. If RE is high and DE is low, the
device enters a low power shutdown mode.
Driver Output Enable. A high level enables the driver differential A and B
outputs. A low level places it in a high impedance state. If RE is high and DE
is low, the device enters a low power shutdown mode.
Driver Input. With a half-duplex part when the driver is enabled, a logic low
on DI forces A low and B high; a logic high on DI forces A high and B low.
With a full-duplex part when the driver is enabled, a logic low on DI forces Y
low and Z high; a logic high on DI forces Y high and Z low.
Ground.
Noninverting Driver Output.
Noninverting Receiver Input A and Noninverting Driver Output A.
Noninverting Receiver Input A.
Inverting Driver Output.
Inverting Receiver Input B and Inverting Driver Output B.
Inverting Receiver Input B.
Power Supply, 3.3 V ± 0.3 V. Bypass V
No Connect. Not internally connected. Can be connected to GND.
TOP VIEW
8
7
6
5
A
B
Z
Y
CC
to GND with a 0.1 μF capacitor.
GND
GND
RO
NC
RE
DE
DI
Figure 6. ADM3491E
1
2
3
4
5
6
7
NC = NO CONNECT
Pin Configuration
(Not to Scale)
ADM3491E
TOP VIEW
14
13
12
11
10
9
8
V
V
A
B
Z
Y
NC
CC
CC

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