PIC18F452-I/PT Microchip Technology Inc., PIC18F452-I/PT Datasheet - Page 79

no-image

PIC18F452-I/PT

Manufacturer Part Number
PIC18F452-I/PT
Description
44 PIN, 32 KB FLASH, 1536 RAM, 34 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F452-I/PT

A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F452-I/PT
Manufacturer:
EPSON
Quantity:
100
Part Number:
PIC18F452-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F452-I/PT
Manufacturer:
MICROCH
Quantity:
20 000
Company:
Part Number:
PIC18F452-I/PT
Quantity:
5 000
REGISTER 8-3:
© 2006 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON3 REGISTER
bit 7
INT2IP: INT2 External Interrupt Priority bit
1 = High priority
0 = Low priority
INT1IP: INT1 External Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as '0'
INT2IE: INT2 External Interrupt Enable bit
1 = Enables the INT2 external interrupt
0 = Disables the INT2 external interrupt
INT1IE: INT1 External Interrupt Enable bit
1 = Enables the INT1 external interrupt
0 = Disables the INT1 external interrupt
Unimplemented: Read as '0'
INT2IF: INT2 External Interrupt Flag bit
1 = The INT2 external interrupt occurred (must be cleared in software)
0 = The INT2 external interrupt did not occur
INT1IF: INT1 External Interrupt Flag bit
1 = The INT1 external interrupt occurred (must be cleared in software)
0 = The INT1 external interrupt did not occur
Legend:
R = Readable bit
- n = Value at POR
Note:
INT2IP
R/W-1
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state
of its corresponding enable bit or the global enable bit. User software should ensure
the appropriate interrupt flag bits are clear prior to enabling an interrupt. This feature
allows for software polling.
INT1IP
R/W-1
U-0
W = Writable bit
’1’ = Bit is set
INT2IE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
INT1IE
R/W-0
U-0
PIC18FXX2
x = Bit is unknown
INT2IF
R/W-0
DS39564C-page 77
INT1IF
R/W-0
bit 0

Related parts for PIC18F452-I/PT