DSPIC33FJ64MC506-I/PT Microchip Technology Inc., DSPIC33FJ64MC506-I/PT Datasheet - Page 154
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DSPIC33FJ64MC506-I/PT
Manufacturer Part Number
DSPIC33FJ64MC506-I/PT
Description
DSP, 16-Bit, 64KB Flash, 8KB RAM, 53 I/O, TQFP-64
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ64MC506-IPT.pdf
(370 pages)
Specifications of DSPIC33FJ64MC506-I/PT
A/d Inputs
16-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
CAN, I2C, SPI, UART/USART
Ios
53
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC506-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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dsPIC33F
REGISTER 8-1:
DS70165E-page 152
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CLKLOCK
R/W-0
U-0
—
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Selection bits (read-only)
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator (FRC) with PLL
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator (XT, HS, EC) with PLL
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = Fast RC oscillator (FRC) with Divide-by-16
111 = Fast RC oscillator (FRC) with Divide-by-n
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Selection bits
000 = Fast RC oscillator (FRC)
001 = Fast RC oscillator (FRC) with PLL
010 = Primary oscillator (XT, HS, EC)
011 = Primary oscillator (XT, HS, EC) with PLL
100 = Secondary oscillator (SOSC)
101 = Low-Power RC oscillator (LPRC)
110 = Fast RC oscillator (FRC) with Divide-by-16
111 = Fast RC oscillator (FRC) with Divide-by-n
CLKLOCK: Clock Lock Enable bit
1 = If (FCKSM1 = 1), then clock and PLL configurations are locked.
0 = Clock and PLL selections are not locked, configurations may be modified
Unimplemented: Read as ‘0’
LOCK: PLL Lock Status bit (read-only)
1 = Indicates that PLL is in lock, or PLL start-up timer is satisfied
0 = Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
Unimplemented: Read as ‘0’
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
Unimplemented: Read as ‘0’
LPOSCEN: Secondary (LP) Oscillator Enable bit
1 = Enable secondary oscillator
0 = Disable secondary oscillator
OSWEN: Oscillator Switch Enable bit
1 = Request oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
If (FCKSM1 = 0), then clock and PLL configurations may be modified.
R-0
U-0
—
OSCCON: OSCILLATOR CONTROL REGISTER
W = Writable bit
COSC<2:0>
y = Value set from Configuration bits on POR
‘1’ = Bit is set
LOCK
R-0
R-0
R-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0
U-0
CF
—
R/W-y
U-0
—
© 2007 Microchip Technology Inc.
NOSC<2:0>
x = Bit is unknown
LPOSCEN
R/W-y
R/W-0
OSWEN
R/W-y
R/W-0
bit 8
bit 0
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