DSPIC33FJ64MC506-I/PT Microchip Technology Inc., DSPIC33FJ64MC506-I/PT Datasheet - Page 41
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DSPIC33FJ64MC506-I/PT
Manufacturer Part Number
DSPIC33FJ64MC506-I/PT
Description
DSP, 16-Bit, 64KB Flash, 8KB RAM, 53 I/O, TQFP-64
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ64MC506-IPT.pdf
(370 pages)
Specifications of DSPIC33FJ64MC506-I/PT
A/d Inputs
16-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
53
Interface
CAN, I2C, SPI, UART/USART
Ios
53
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
8K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC506-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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3.0
The dsPIC33F architecture features separate program
and data memory spaces and buses. This architecture
also allows the direct access of program memory from
the data space during code execution.
FIGURE 3-1:
© 2007 Microchip Technology Inc.
Note:
MEMORY ORGANIZATION
This data sheet summarizes the features
of this group of dsPIC33F devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
dsPIC33FJ64XXXXX
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(22K instructions)
GOTO Instruction
Unimplemented
Reset Address
Flash Memory
User Program
(Read ‘0’s)
Reserved
Registers
DEVID (2)
Reserved
Reserved
PROGRAM MEMORY MAP FOR dsPIC33F FAMILY DEVICES
dsPIC33FJ128XXXXX
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(44K instructions)
GOTO Instruction
Unimplemented
Reset Address
Preliminary
Flash Memory
User Program
(Read ‘0’s)
DEVID (2)
Reserved
Reserved
Registers
Reserved
3.1
The program address memory space of the dsPIC33F
devices is 4M instructions. The space is addressable by a
24-bit value derived from either the 23-bit Program Counter
(PC) during program execution, or from table operation
or data space remapping as described in Section 3.6
“Interfacing Program and Data Memory Spaces”.
User access to the program memory space is restricted
to the lower half of the address range (0x000000 to
0x7FFFFF). The exception is the use of TBLRD/TBLWT
operations, which use TBLPAG<7> to permit access to
the Configuration bits and Device ID sections of the
configuration memory space.
Memory maps for the dsPIC33F family of devices are
shown in Figure 3-1.
Program Address Space
dsPIC33FJ256XXXXX
Alternate Vector Table
Interrupt Vector Table
Device Configuration
(88K instructions)
Unimplemented
GOTO
Reset Address
Flash Memory
User Program
(Read ‘0’s)
DEVID (2)
Reserved
Registers
Reserved
Reserved
Instruction
dsPIC33F
DS70165E-page 39
0x000000
0x000002
0x000004
0x0000FE
0x000100
0x000104
0x0001FE
0x000200
0x00ABFE
0x00AC00
0x0157FE
0x015800
0x02ABFE
0x02AC00
0x7FFFFE
0x800000
0xF7FFFE
0xF80000
0xF80017
0xF80010
0xFEFFFE
0xFF0000
0xFFFFFE
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