DSPIC30F5015-30I/PT Microchip Technology Inc., DSPIC30F5015-30I/PT Datasheet - Page 143

• Manufacturer Part Number: DSPIC30F5015-30I/PT
• Description: DSP, 16-Bit, 66 KB Flash, 2KB RAM, 52 I/O, TQFP-64
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F5015-30I/PT

• A/d Inputs: 16-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 52
• Interface: CAN, I2C, SPI, UART/USART
• Ios: 52
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 64-pin TQFP
• Programmable Memory: 66K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

FIGURE 20-5:
20.3.1.1
The oscillator start-up circuitry is not linked to the POR
circuitry.
frequency crystals) will have a relatively long start-up
time. Therefore, one or more of the following conditions
is possible after the POR timer and the PWRT have
expired:
• The oscillator circuit has not begun to oscillate.
• The Oscillator Start-up Timer has NOT expired (if
• The PLL has not achieved a LOCK (if PLL is
If the FSCM is enabled and one of the above conditions
is true, then a clock failure trap will occur. The device
will automatically switch to the FRC oscillator and the
user can switch to the desired crystal oscillator in the
trap, ISR.
20.3.1.2
If the FSCM is disabled and the Power-up Timer
(PWRT) is also disabled, then the device will exit rap-
idly from Reset on power-up. If the clock source is
FRC, LPRC, EXTRC or EC, it will be active
immediately.
If the FSCM is disabled and the system clock has not
started, the device will be in a frozen state at the Reset
vector until the system clock starts. From the user’s
perspective, the device will appear to be in Reset until
a system clock is available.
© 2007 Microchip Technology Inc.
a crystal oscillator is used).
used).
PWRT Time-out
OST Time-out
Internal Reset
Internal POR
Some
POR with Long Crystal Start-up Time
Operating without FSCM and PWRT
(with FSCM Enabled)
MCLR
V
DD
crystal
TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO V
circuits
(especially
T
OST
low
T
PWRT
20.3.2
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit. The main purpose of
the BOR module is to generate a device Reset when
a brown-out condition occurs. Brown-out conditions
are generally caused by glitches on the AC mains
(i.e., missing portions of the AC cycle waveform due
to bad power transmission lines or voltage sags due
to excessive current draw when a large inductive load
is turned on).
The BOR module allows selection of one of the
following voltage trip points:
• 2.6V-2.71V
• 4.1V-4,4V
• 4.58V-4.73V
A BOR will generate a Reset pulse which will reset the
device. The BOR will select the clock source, based on
the
FPR<4:0>). Furthermore, if an oscillator mode is
selected, the BOR will activate the Oscillator Start-up
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock will be held
until the LOCK bit (OSCCON<5>) is ‘1’.
Note:
dsPIC30F5015/5016
Configuration
BOR: PROGRAMMABLE
BROWN-OUT RESET
The BOR voltage trip points indicated here
are nominal values provided for design
guidance only.
bit
values
DD
DS70149C-page 141
): CASE 2
(FOS<2:0>
and