74LVXC4245WM Fairchild Semiconductor, 74LVXC4245WM Datasheet - Page 4

• Manufacturer Part Number: 74LVXC4245WM
• Description: TXRX 8BIT DUAL CONF VOLT 24SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74LVr
• Type: Transceiverr

Specifications of 74LVXC4245WM

• Number Of Drivers/receivers: 8/8
• Voltage - Supply: 2.7 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Logic Family: LVX
• Operating Supply Voltage (typ): 3.3/5/5V
• Propagation Delay Time: 11ns
• Number Of Elements: 1
• Number Of Channels: 8
• Input Logic Level: CMOS
• Output Logic Level: CMOS
• Output Type: 3-State
• Package Type: SOIC W
• Polarity: Non-Inverting
• Operating Supply Voltage (min): 2.7/4.5V
• Operating Supply Voltage (max): 5.5V
• Technology: CMOS
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Additional Features: W/Volt Translation
• Pin Count: 24
• Logic Device Type: Transceiver, Non Inverting
• Supply Voltage Range: 4.5V To 5.5V
• Logic Case Style: SOIC
• No. Of Pins: 24
• Operating Temperature Range: -40°C To +85°C
• Svhc: No SVHC (15-Dec-2010)
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Protocol: -
• Lead Free Status / Rohs Status: Compliant

www.fairchildsemi.com
I
I
I
I
I
V
V
V
V
V
V
V
V
OZA
OZB
CCA1
CCA2
CCB
Symbol
DC Electrical Characteristics
Note 3: Worst case package.
Note 4: Max number of outputs defined as (n). Data inputs are driven 0V to V
Note 5: Max number of Data Inputs (n) switching. (n 1) inputs switching 0V to V
V
I
OLPA
OLPB
OLVA
OLVB
IHDA
IHDB
ILDA
ILDB
CC
CC
level to threshold (V
Maximum 3-STATE
Output Leakage @ A
Maximum 3-STATE
Output Leakage @ B
Maximum
I
Quiescent V
Supply Current as B
Port Floats
Quiescent V
Supply Current
Quiescent V
Supply Current
Quiet Output
Maximum Dynamic
V
Quiet Output Minimum
Dynamic V
Minimum HIGH Level
Dynamic Input
Voltage
Maximum LOW Level
Dynamic Input
Voltage
CC
OL
/Input
Parameter
OL
CCA
CCA
CCB
IHD
), 0V to threshold (V
n
n
All Inputs
B
n
ILD
), f
V
(V)
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.5
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
CCA
1 MHz.
V
Open
(Continued)
(V)
3.6
5.5
3.6
5.5
5.5
3.6
3.6
5.5
3.6
5.5
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
CCB
Typ
1.0
CC
4
T
CC
A
level; one output at GND.
level. Input-under-test switching:
25 C
1.35
0.35
1.5
1.5
0.8
1.5
2.0
2.0
2.0
3.5
0.8
0.8
0.8
1.5
0.5
0.5
0.5
0.5
1.2
1.2
0.8
1.2
8
8
8
5
8
Guaranteed Limits
T
A
40 C to 85 C
1.5
0.5
80
80
80
50
80
5.0
5.0
5.0
5.0
Units
mA
mA
V
V
V
V
V
V
V
V
A
A
A
A
A
V
V
V
V
V
V
A
B
T/R
Open
A
B
OE
A
B
OE
(Note 3) (Note 4)
(Note 3) (Note 4)
(Note 3) (Note 4)
(Note 3) (Note 4)
(Note 3) (Note 5)
(Note 3) (Note 5)
(Note 3) (Note 5)
(Note 3) (Note 5)
I
O
I
O
I
I
n
n
n
n
n
n
V
V
V
V
V
Open, OE
V
V
V
V
V
V
GND, T/R
GND, T/R
IL
IL
CC
CCB
V
CCA
CCA
CCB
CCA
CCB
Conditions
CCA
CCB
, V
, V
CCA
IH
IH
, GND
, GND
or GND
or GND
or GND
or GND
or GND
2.1V
, V
, OE
, OE
0.6V
CCB
V
GND
V
V
V
CCA
CCA
CCA
CCA