PIC16F737-I/SO Microchip Technology Inc., PIC16F737-I/SO Datasheet - Page 157

• Manufacturer Part Number: PIC16F737-I/SO
• Description: MCU, 8-Bit, 4KW Flash, 368 RAM, 25 I/O, SOIC-28
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F737-I/SO

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 25
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SOIC
• Programmable Memory: 7K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

The value in the ADRESH/ADRESL registers is not
modified for a Power-on Reset. The ADRESH/
ADRESL registers will contain unknown data after a
Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 12.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. An acquisition time can be programmed to
occur between setting the GO/DONE bit and the actual
start of the conversion.
The following steps should be followed to do an A/D
conversion:
1.
FIGURE 12-1:
 2004 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
digital I/O (ADCON1)
Converter
A/D
A/D BLOCK DIAGRAM
(Reference
(Reference
Voltage)
Voltage)
V
V
REF
REF
-
+
(Input Voltage)
VCFG<1:0>
VCFG<1:0>
V
IN
V
DD
V
2.
3.
4.
5.
6.
7.
SS
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set PEIE bit
• Set GIE bit
Wait the required acquisition time (if required).
Start conversion:
• Set GO/DONE bit (ADCON0 register)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF (if required).
For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
CHS<3:0>
1101
1100
1011
0011
0010
0001
0000
AD
. A minimum wait of 2 T
PIC16F7X7
DS30498C-page 155
AN13
AN12
AN11
AN3/V
AN2/V
AN1
AN0
REF
REF
+
-
AD
is