PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 124
PIC16F636-I/P
Manufacturer Part Number
PIC16F636-I/P
Description
14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F636-IP.pdf
(196 pages)
Specifications of PIC16F636-I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC12F635/PIC16F636/639
12.9.2
An overflow (FFh
the T0IF (INTCON<2>) bit. The interrupt can be
enabled/disabled by setting/clearing T0IE (INTCON<5>)
bit. See Section 5.0 “Timer0 Module” for operation of
the Timer0 module.
FIGURE 12-7:
DS41232B-page 122
TMR0 INTERRUPT
Note 1: PIC16F636/639 only.
IOC-RA0
IOC-RA1
IOC-RA2
IOC-RA3
IOC-RA4
IOC-RA5
TMR1IE
TMR1IF
C2IF
C2IE
IOCA0
IOCA1
IOCA2
IOCA3
IOCA4
IOCA5
OSFIF
OSFIE
LVDIF
LVDIE
CRIE
CRIF
EEIF
EEIE
C1IF
C1IE
(1)
00h) in the TMR0 register will set
(1)
INTERRUPT LOGIC
Preliminary
RAIE
INTF
INTE
RAIF
PEIE
T0IF
T0IE
GIE
12.9.3
An input change on PORTA change sets the RAIF
(INTCON<0>) bit. The interrupt can be enabled/
disabled by setting/clearing the RAIE (INTCON<3>)
bit. Plus, individual pins can be configured through the
IOCA register.
Note:
PORTA INTERRUPT
If a change on the I/O pin should occur
when the read operation is being executed
(start of the Q2 cycle), then the RAIF
interrupt flag may not get set.
Wake-up (If in Sleep mode)
© 2005 Microchip Technology Inc.
Interrupt to CPU
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