PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 36

• Manufacturer Part Number: PIC16F636-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F636-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F635/PIC16F636/639
3.4.3
The Low-Frequency Internal Oscillator (LFINTOSC) is
an uncalibrated (approximate) 31 kHz internal clock
source.
The output of the LFINTOSC connects to a postscaler
and multiplexer (see Figure 3-1). 31 kHz can be
selected via software using the IRCF bits (see
Section 3.4.4 “Frequency Select Bits (IRCF)”). The
LFINTOSC is also the clock source for the Power-up
Timer (PWRT), Watchdog Timer (WDT) and Fail-Safe
Clock Monitor (FSCM).
The LFINTOSC is enabled by selecting 31 kHz
(IRCF = 000) as the system clock source (SCS = 1), or
when any of the following are enabled:
• Two-Speed Start-up (IESO = 1 and IRCF = 000)
• Power-up Timer (PWRT)
• Watchdog Timer (WDT)
• Fail-Safe Clock Monitor (FSCM)
The LF Internal Oscillator (LTS) bit (OSCCON<1>)
indicates whether the LFINTOSC is stable or not.
3.4.4
The output of the 8 MHz HFINTOSC and 31 kHz
LFINTOSC connects to a postscaler and multiplexer
(see Figure 3-1). The Internal Oscillator Frequency
Select bits, IRCF<2:0> (OSCCON<6:4>), select the
frequency output of the internal oscillators. One of eight
frequencies can be selected via software:
• 8 MHz
• 4 MHz (Default after Reset)
• 2 MHz
• 1 MHz
• 500 kHz
• 250 kHz
• 125 kHz
• 31 kHz
DS41232B-page 34
Note:
LFINTOSC
FREQUENCY SELECT BITS (IRCF)
Following any Reset, the IRCF bits are set
to ‘110’ and the frequency selection is set
to 4 MHz. The user can modify the IRCF
bits to select a different frequency.
Preliminary
3.4.5
When switching between the LFINTOSC and the
HFINTOSC, the new oscillator may already be shut
down to save power. If this is the case, there is a 10 s
delay after the IRCF bits are modified before the
frequency selection takes place. The LTS/HTS bits will
reflect the current active status of the LFINTOSC and
the HFINTOSC oscillators. The timing of a frequency
selection is as follows:
1.
2.
3.
4.
5.
6.
If the internal oscillator speed selected is between
8 MHz and 125 kHz, there is no start-up delay before
the new frequency is selected. This is because the old
and the new frequencies are derived from the
HFINTOSC via the postscaler and multiplexer.
Note:
IRCF bits are modified.
If the new clock is shut down, a 10 s clock start-
up delay is started.
Clock switch circuitry waits for a falling edge of
the current clock.
CLKOUT is held low and the clock switch
circuitry waits for a rising edge in the new clock.
CLKOUT is now connected with the new clock.
HTS/LTS bits are updated as required.
Clock switch is complete.
HFINTOSC AND LFINTOSC CLOCK
SWITCH TIMING
Care must be taken to ensure a valid
voltage or frequency selection is chosen.
See voltage vs. frequency diagrams
(Figure 15-2, Figure 15-3 and Figure 15-4)
for more detail.
© 2005 Microchip Technology Inc.