DS1315-5+ Dallas Semiconductor, DS1315-5+ Datasheet - Page 18

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DS1315-5+

Manufacturer Part Number
DS1315-5+
Description
PHANTOM TIME CHIP 16P DIP 5V
Manufacturer
Dallas Semiconductor
Datasheet

Specifications of DS1315-5+

Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
NOTES:
1) All voltages are referenced to ground.
2) Measured with load shown in Figure 15.
3) Input pulse rise and fall times equal 10ns.
4) t
5) t
6) Measured without RAM connected.
7) I
8) Applies to
9) I
10) Applies to all input pins except
11) See Figures 11 and 12.
12) See Figures 13 and 14.
13) V
14) V
Figure 13. 3.3V Power-Up Condition
mode.
ROM mode.
backup mode.
CEO
WR
DH
CCO1
CCO2
SW
SW
is a function of the latter occurring edge of
and t
is determined by the larger of V
is determined by the smaller of V
is the maximum average load current the DS1315 can supply to external memory.
will go to a low level as V
is the maximum average load current that the DS1315 can supply to memory in the battery
DS
CEO
are functions of the first occurring edge of
with the ROM/
CCI
RST
RAM
falls below V
.
BAT1
RST
BAT1
pin grounded. When the ROM/
and V
, V
is pulled internally to V
BAT2
18 of 22
BAT2
BAT
, and V
WE
.
.
or
PF
WE
CE
.
or
in RAM mode, or
CE
CCI
in RAM mode, or
.
RAM
DS1315 Phantom Time Chip
pin is connected to V
OE
or
OE
CE
or
in ROM
CE
CCO
in
,

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