SI5110-H-GL Silicon Laboratories Inc, SI5110-H-GL Datasheet - Page 29

• Manufacturer Part Number: SI5110-H-GL
• Description: IC TXRX SONET/SDH LP HS 99LFBGA
• Manufacturer: Silicon Laboratories Inc
• Series: SiPHY®r
• Type: Transceiverr

Specifications of SI5110-H-GL

• Package / Case: 99-LFBGA
• Number Of Drivers/receivers: 1/1
• Protocol: SONET/SDH
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Product: PHY
• Supply Voltage (max): 1.89 V, 3.47 V
• Supply Voltage (min): 1.71 V
• Supply Current: 0.7 A
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 20 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 1300 mW
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Number(s)
Pin
D8
A4
A5
A3
C6
K8
K7
K6
K5
TXCLK4OUT+,
TXCLK4OUT–
SLICEMODE
TXCLK4IN+,
RXMSBSEL
TXCLK4IN–
RXSQLCH
SLICELVL
RXREXT
Name
I/O
O
I
I
I
I
I
Signal Level
LVTTL
LVTTL
LVTTL
LVDS
LVDS
Rev. 1.4
Receive Data Bus Bit Order Select.
This input determines the order of the received data
bits on the RXDOUT[3:0] output bus.
For RXMSBSEL = 0, the first data bit received is out-
put on RXDOUT0 and following data bits are output
on RDOUT1 through RXDOUT3.
For RXMSBSEL = 1, the first data bit is output on
RXDOUT3 and following data bits are output on
RXDOUT2 through RXDOUT0.
Note: This input has an internal pulldown.
Receiver External Bias Resistor.
This resistor is used by the receiver circuitry to estab-
lish bias currents within the device. This pin must be
connected to GND through a 3.09 k Ω ( 1 %) resistor.
Receiver Data Squelch.
When this input is low, the data on RXDOUT[3:0] is
forced to a zero state. Set RXSQLCH high for normal
operation.
The RXSQLCH input is ignored when operating in
Diagnostic Loopback mode (DLBK = 0).
Note: This input has an internal pullup.
Slicing Level Adjustment.
Applying an analog voltage to this pin allows adjust-
ment of the slicing level applied to the input data eye.
Tying this input to VREF sets the slicing offset to 0.
Slice Level Adjustment Mode.
The SLICEMODE input is used to select the mode of
operation for slicing level adjustment. When SLICE-
MODE = 0, Absolute Slice mode is selected. When
SLICEMODE = 1, Proportional Slice mode is selected.
Note: This input has an internal pulldown.
Differential Transmit Data Clock Input.
The rising edge of this input clocks data present on
TXDIN into the device. TXCLK 4IN is also used as the
Si5100 reference clock when the REFSEL input is set
low.
Divided Down Transmit Clock Output.
This clock output is generated by dividing down the
high-speed output clock, TXCLKOUT, by a factor of 4.
It is intended for use in counter clocking schemes that
transfer data between the system framer and the
Si5110. (See REFSEL and REFRATE descriptions.)
Description
Si5110
29