SC403MLTRT Semtech, SC403MLTRT Datasheet - Page 17

• Manufacturer Part Number: SC403MLTRT
• Manufacturer: Semtech

Specifications of SC403MLTRT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Applications Information (continued)
Note that this control method regulates the valley of the
output ripple voltage, not the DC value. The DC output
voltage V
following equation.
When a large capacitor is placed in parallel with R1 (C
V
Enable and Power Save Input
The EN/PSV input is used to enable or disable the switch-
ing regulator. When EN/PSV is low (grounded), the switch-
ing regulator is off and in its lowest power state. When off,
the output of the switching regulator soft-discharges the
output into a 15Ω internal resistor via the V
EN/PSV is allowed to float, the pin voltage will float to 33%
of the voltage at VDD. The switching regulator turns on
with PSAVE (power save) disabled and all switching is in
forced continuous mode.
When EN/PSV is high (above 45% of the voltage at VDD),
the switching regulator turns on with ultrasonic power-
save enabled. The ultrasonic PSAVE operation maintains a
minimum switching frequency of 25kHz, for applications
with stringent audio requirements.
Forced Continuous Mode Operation
The SC403 operates the switcher in FCM (Forced
Continuous Mode) by floating the EN/PSV pin (see Figure
4). In this mode one of the power MOSFETs is always on,
with no intentional dead time other than to avoid cross-
conduction. This feature results in uniform frequency
across the full load range with the trade-off being poor
efficiency at light loads due to the high-frequency switch-
ing of the MOSFETs. DH is the gate signal driving the
upper MOSFET. DL is the lower gate signal driving the
lower MOSFET.
V
OUT
OUT
V
is shown by the following equation.
OUT
. 0
OUT
75
. 0
75
is offset by the output ripple according to the
1
1
R
R
2
1
R
R
1
2
V
RIPPLE
V
2
RIPPLE
2
1
1
R
R
2
R (
2
OUT
1
R
R
1
pin. When
C
1
TOP
C
TOP
)
2
TOP
2
)
Ultrasonic PSAVE Operation
The SC403 provides ultrasonic PSAVE operation at light
loads, with the minimum operating frequency fixed at
25kHz. This is accomplished using an internal timer that
monitors the time between consecutive high-side gate
pulses. If the time exceeds 40µs, DL drives high to turn the
low-side MOSFET on. This draws current from V
the inductor, forcing both V
drops to the 750mV threshold, the next DH on-time is trig-
gered. After the on-time is completed the high-side
MOSFET is turned off and the low-side MOSFET turns on.
The low-side MOSFET remains on until the inductor
current ramps down to zero, at which point the low-side
MOSFET is turned off.
Voltage (V
DH
DL
Inductor
Current
FB Ripple
Figure 4 — Forced Continuous Mode Operation
DL remains high until V
FB
)
DL drives high when on-time is completed.
On-time
(T
ON
)
V
DH on-time is triggered when
OUT
FB
FB
reaches the FB Threshold.
and V
falls to the FB threshold.
FB
to fall. When V
DC Load Current
FB threshold
OUT
(750mV)
through
17
FB