SC403MLTRT Semtech, SC403MLTRT Datasheet - Page 26

• Manufacturer Part Number: SC403MLTRT
• Manufacturer: Semtech

Specifications of SC403MLTRT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Applications Information (continued)
Using Ceramic Output Capacitors
For applications using ceramic output capacitors, the ESR
is normally too small to meet the above ESR criteria. In
these applications it is necessary to add a small virtual ESR
network composed of two capacitors and one resistor, as
shown in Figure 14. This network creates a ramp voltage
across C
the ESR of a standard capacitor. This ramp is then capaci-
tively coupled into the FB pin via capacitor C
Dropout Performance
The output voltage adjust range for continuous-conduc-
tion operation is limited by the fixed 80ns (typical)
minimum off-time of the one-shot. When working with
low input voltages, the duty-factor limit must be calcu-
lated using worst-case values for on and off times.
The duty-factor limitation is shown by the next equation.
The inductor resistance and MOSFET on-state voltage
drops must be included when performing worst-case
dropout duty-factor calculations.
E
DUTY
SR
High-
Low-
side
side
L
MIN
, analogous to the ramp voltage generated across
Figure 14 — Virtual ESR Ramp Circuit
t
ON
2
Network
Virtual
(
MIN
ESR
t
ON
)
R
C
C
(
L
3
MIN
t
OUT
C
OFF
)
(
MAX
L
f
pin
FB
sw
C
)
L
R1
R2
C
C
.
OUT
System DC Accuracy (V
Three factors affect V
error comparator, the ripple voltage variation with line
and load, and the external resistor tolerance. The error
comparator offset is trimmed so that under static condi-
tions it trips when the feedback pin is 750mV, +1%.
The on-time pulse from the SC403 in the design example
is calculated to give a pseudo-fixed frequency of 300kHz.
Some frequency variation with line and load is expected.
This variation changes the output ripple voltage. Because
constant on-time converters regulate to the valley of the
output ripple, ½ of the output ripple appears as a DC regu-
lation error. For example, if the output ripple is 50mV with
V
above the comparator trip point. If the ripple increases to
80mV with V
40mV above the comparator trip. The best way to mini-
mize this effect is to minimize the output ripple.
To compensate for valley regulation, it may be desirable to
use passive droop. Take the feedback directly from the
output side of the inductor and place a small amount of
trace resistance between the inductor and output capaci-
tor. This trace resistance should be optimized so that at
full load the output droops to near the lower regulation
limit. Passive droop minimizes the required output capaci-
tance because the voltage excursions due to load steps
are reduced as seen at the load.
The use of 1% feedback resistors may result in up to 1%
error. If tighter DC accuracy is required, 0.1% resistors
should be used.
The output inductor value may change with current. This
will change the output ripple and therefore will have a
minor effect on the DC output voltage. The output ESR
also affects the output ripple and thus has a minor effect
on the DC output voltage.
Switching Frequency Variation
The switching frequency will vary depending upon line
and load conditions. The line variation is a result of fixed
propagation delays in the on-time one-shot, as well as
unavoidable delays in the external MOSFET switching. As
V
slightly longer than the ideal on-time. The net effect is
IN
IN
= 6 volts, then the measured DC output will be 25mV
increases, these factors make the actual DH on-time
IN
= 25V, then the measured DC output will be
OUT
accuracy: the trip point of the FB
OUT
Controller)
SC403
26