SC403MLTRT Semtech, SC403MLTRT Datasheet - Page 19

• Manufacturer Part Number: SC403MLTRT
• Manufacturer: Semtech

Specifications of SC403MLTRT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Applications Information (continued)
Setting the valley current limit to 6A results in a peak induc-
tor current of 6A plus the peak-to-peak ripple current. In
this situation, the average (load) current through the induc-
tor is 6A plus one-half the peak-to-peak ripple current.
The internal 10μA current source is temperature compen-
sated at 4100ppm in order to provide tracking with the
RDS
The R
where I
When selecting a value for R
maximum voltage value for the ILIM pin. Note that because
the low-side MOSFET with low RDS
sensing, the PCB layout, solder connections, and PCB connec-
tion to the LX node must be done carefully to obtain good
results. R
Soft-Start of PWM Regulator
SC403 has a programmable soft-start time that is con-
trolled by an external capacitor at the SS pin. After the
controller meets both UVLO and EN/PSV thresholds, the
controller has an internal current source of 2.75µA flowing
through the SS pin to charge the capacitor. During the
start up process (Figure 8), 50% of the voltage at the SS
pin is used as the reference for the FB comparator. The
PWM comparator issues an on-time pulse when the
voltage at the FB pin is less than 50% of the SS pin. As
result, the output voltage follows the SS start voltage. The
output voltage reaches and maintains regulation when
the soft start voltage is > 1.5V. The time between the first
LX pulse and when V
time (t
by the following equation.
R
ON
ILIM
ILIM
.
SS
LIM
). The calculation for the soft-start time is shown
ILIM
value is calculated by the following equation.
= 1176 x I
is in Amps.
should be connected directly to LXS (pin 28).
Figure 7 — Valley Current Limit
LIM
OUT
x [0.088 x (5V - V
meets regulation is the soft start
Time
ILIM
do not exceed the absolute
ON
is used for current
DD
) + 1] (Ω)
I
I
PEAK
LOAD
I
LIM
The voltage at the SS pin continues to ramp up and eventu-
ally is equal to 64% of V
pin voltage is compared to an internal reference of 0.75V.
The delay time between the V
PGOOD going high is shown by the following equation.
Pre-Bias Startup
SC403 can start up as if in a soft-start condition with an
existing output voltage level. The soft start time is still the
same as normal start up (when the output voltage starts
from zero). The output voltage starts to ramp up when
one-half of the voltage at SS pin meets the pre-charge FB
voltage level. Pre-bias startup is achieved by turning off
the lower gate when the inductor current falls below zero.
This method prevents the output voltage from
decreasing.
Power Good Output
The PGOOD (power good) output is an open-drain output
which requires a pull-up resistor. When the voltage at the
FB pin is 10% below the nominal voltage, PGOOD is pulled
low. It is held low until the output voltage returns above
92% of nominal.
PGOOD will transition low if the V
nominal, which is also the over-voltage shutdown thresh-
old. PGOOD also pulls low if the EN/PSV pin is low when
V
DD
voltage is present.
t
PGOOD
t
(500mV/div)
SS
(10mV/div)
(2V/div)
(5V/div)
Figure 8 — Soft-start Timing Diagram
-
C
DELAY
SS
. 2
1
C
75
5 .
SS
V
DD
A
. After soft start completes, the FB
(
. 0
Time (400µs/div)s/div)
64
. 2
75
V
OUT
DD
A
/div)
FB
regulation point and
pin exceeds +20% of
1
5 .
V
)
SC403
19