PSB21150HV14XP Lantiq, PSB21150HV14XP Datasheet - Page 265

• Manufacturer Part Number: PSB21150HV14XP
• Manufacturer: Lantiq

Specifications of PSB21150HV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Compliant

A
A4SEL bit
A5SEL bit
A7SEL bit
Absolute maximum ratings
AC characteristics
ACFG1 register
ACFG2 register
ACKxy bits
ACL bit
Activation
Activation indication - pin ACL
Activation LED
Activation/deactivation of IOM-2 inter-
AOE register
Appendix
Applications
AR7-0 bits
Architecture
ARX register
ASTI register
Asynchronous awake
AT7-0 bits
ATX register
AUX bit
AUXI register
Auxiliary interface
AUXM register
B
BAC bit
BAS bit
BCHx_CR registers
BCHx_TSDP_BC1/2 registers
Block diagram
BUS bit
Bus operation modes
C
C/I channel
C/R bit
Data Sheet
face
185, 242
202
187
224
188
191
265
94
202
202
202
205
204
218
128
33
20
205
204
204
218
138
225
34
226
49
202
202
141
250
211
40
140
245
49
207
265
Capacitances
CDA_TSDPxy registers
CDAx_CR register
CDAxy registers
CFS bit
CI_CS bit
CI1E bit
CIC bit
CIC1/0 bits
CICW bit
CIR0 register
CIR1 register
CIX0 register
CIX1 register
CLKM bit
Clock generation
CMDR register
CMDRB register
CNT bits
CODR0 bits
CODR1 bits
CODX0 bits
CODX1 bits
Control of layer-1
Controller data access
CRC bit
D
D_EN_B2/1 bits
D_EN_D bit
DC characteristics
DCH_INH bit
D-channel access control
DCI_CR register
Deactivation
Delay between IOM-2 and S
DESIGN bits
Device architecture
Intelligent NT
S-bus D-channel control in LT-T
134
S-bus priority mechanism
TIC bus
224
227
185, 242
189
182, 230
189
216
216
187
188
190
212
187
189
94
229
200
188
190
187
189
248
178
212
206
234
212
70
129
75
246
208
33
PSB/PSF 21150
134
102
207
59
2003-01-30
IPAC-X
131