MC145574APBR2 Freescale Semiconductor, MC145574APBR2 Datasheet - Page 43

• Manufacturer Part Number: MC145574APBR2
• Manufacturer: Freescale Semiconductor

Specifications of MC145574APBR2

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Not Compliant

MOTOROLA
SCPCLK
5.2.5
SCP Rx
SCPEN
SCP Tx
Figure 5–6. Serial Control Byte Register Write Operation Double 8–Bit Transaction
DON’T CARE
When SCPEN comes low again, the next eight rising edges of SCPCLK shift data in from
SCP Rx. This data is then stored in the selected byte. Figure 5–6 illustrates this process.
SCP Merged Read/Write
Merged operations are accomplished by not taking SCPEN high between separate SCP instructions.
The SCP bytes/nibbles are strung together in a continuous bit stream and can be a mux or read/write
command. The device is able to extract the separate instructions and provide the appropriate response.
The SCPEN signal goes low at the start of the bit stream and goes high again at the end.
Figure 5–7 illustrates this process with two consecutive nibble register read operations. The merged
instructions can be a free mix of nibble/byte/read/write operations.
NOTES:
SCPCLK
SCP Rx
SCPEN
SCP Tx
1. R/W = 1 for a read operation.
2. Data is shifted out on SCP Tx on the falling edges of SCPCLK, MSB first.
3. Data is shifted into the chip from SCP Rx on the rising edges of SCPCLK, MSB first.
R/W
Figure 5–7. Merged Serial Control Port Nibble Register Read Operation
DON’T CARE
Freescale Semiconductor, Inc.
For More Information On This Product,
HIGH IMPEDANCE
A3
R/W
A2
Go to: www.freescale.com
A2
A1
A1
A0
MC145574
A0
HIGH IMPEDANCE
D3
DON’T CARE
DON’T CARE
D2
D1
D0
R/W
D7
IMPEDANCE
D6
A2
HIGH
D5
A1
D4
A0
D3
D3
D2
D2
DON’T CARE
D1
D1
D0
D0
IMPEDANCE
DON’T CARE
HIGH
5–5