PEB3086FV14NP Lantiq, PEB3086FV14NP Datasheet - Page 53
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PEB3086FV14NP
Manufacturer Part Number
PEB3086FV14NP
Description
Manufacturer
Lantiq
Datasheet
1.PEB3086FV14NP.pdf
(262 pages)
Specifications of PEB3086FV14NP
Control Interface
HDLC
Lead Free Status / Rohs Status
Not Compliant
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Sample Time
Figure 19
Frame Relationship
Figure 20
Data Sheet
FSC
DCL
FSC detected
XTAL
SX1 / SX2
MBIT
Counter reset
The sample time of the MBIT input is related to the rising edge of FSC at the beginning of an S0 frame
-- min: 20 * 1 / xtal
-- max: 20 * 1 / xtal + 1 / xtal + 1 / dcl
S (NT -> TE)
FSC (i)
DD (i)
MBIT (i)
'0' or '1'
Sampling Time in LT-S / NT mode (M-Bit input)
Frame Relationship in LT-S / NT mode (M-Bit input)
F
B1 B2
B1
E
D
D
B2
E
don't care
D
B1 B2
M
B1
E
D
D
53
B2
20 XTAL
E
'0' or '1'
D
FBIT (40xXTAL)
F
B1 B2
Description of Functional Blocks
B1
E
D
D
B2
E
B1 B2
D
B1
E
D
D
PEB 3086
2003-01-30
ISAC-SX
B2
21150_29
E
21150_32
D
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