T7295-6EL LSI, T7295-6EL Datasheet - Page 57

• Manufacturer Part Number: T7295-6EL
• Manufacturer: LSI

Specifications of T7295-6EL

• Lead Free Status / Rohs Status: Not Compliant

Data Sheet
April 1997
Lucent Technologies Inc.
Timing Characteristics
1.Edge of clock used to sample FS (selected by the FE bit [R0—B6]).
2.Edge of first bit transmission (see Figures 12—20).
3.The CLKXI bit (R9—B4) controls the edge on which data is transmitted, and the CLKRI bit (R9—B0) controls the edge on which received data
is sampled.
(CLKXI = 1)
(CLKRI = 0)
(CMS = 0, CLKXI = 1, CLKRI = 0, FSPOL = 1, RMB = TBM = 11111111)
AND/OR
(FE = 1)
CLKR
TSCA
CLKX
DRA
DRB
DXA
DXB
OR
FS
3
3
(continued)
Figure 24. Timing for Concentration Highway
B
1
C
2
D
F
H
A
BIT 0
I
D
T7121 HDLC Interface for ISDN (HIFI-64)
J
BIT 7
E
G
5-5050
57