Si5327-EVB Silicon Laboratories Inc, Si5327-EVB Datasheet - Page 13
Si5327-EVB
Manufacturer Part Number
Si5327-EVB
Description
MCU, MPU & DSP Development Tools SI5327 EVAL BOARD
Manufacturer
Silicon Laboratories Inc
Specifications of Si5327-EVB
Processor To Be Evaluated
Si5327
Interface Type
I2C, SPI
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
Details
Table 4. AC Specifications (Continued)
(V
PLL Performance
(fin=fout = 622.08 MHz; BW=120 Hz; LVPECL)
Lock Time
Settle Time
Output Clock Phase
Change
Closed Loop Jitter
Peaking
Jitter Tolerance
Subharmonic Noise
Spurious Noise
*Note: Input to output phase skew after an ICAL is not controlled and can assume any value.
Phase Noise
fout = 622.08 MHz
DD
= 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, T
Parameter
Symbol
t
SP
SP
t
t
CKO
LOCKMP
SETTLE
P_STEP
J
J
TOL
SUBH
SPUR
PK
PN
End of ICAL to F
(n 1, n x F3 < 100 MHz)
Start of ICAL to of LOL
Phase Noise @ 100 kHz
Jitter Frequency Loop
A
= –40 to 85 °C)
1 ppm of final value
Max spur @ n x F3
After clock switch
Test Condition
100 kHz Offset
100 Hz Offset
10 kHz Offset
1 MHz Offset
f3 128 kHz
1 kHz Offset
Bandwidth
Preliminary Rev. 0.4
Offset
OUT
within
5000/BW
Min
—
—
—
—
—
—
—
—
—
—
—
1000
–110
–113
–117
–125
0.05
Typ
200
–80
–80
–65
—
5
Max
0.1
—
—
—
—
—
—
—
—
—
—
—
Si5327
ns pk-pk
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Unit
dBc
dBc
ms
dB
ps
s
13