MM912H634CV1AER2 Freescale Semiconductor, MM912H634CV1AER2 Datasheet - Page 255

• Manufacturer Part Number: MM912H634CV1AER2
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CV1AER2

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Read: Anytime
Write: LVIE and LVIF are write anytime, LVDS is read only
4.38.3.2.15
The CPMUAPICTL register allows the configuration of the autonomous periodical interrupt features.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Note:
0x02F2
187.
Reset
Reset
LVDS
Field
LVIE
LVIF
2
1
0
The Reset state of LVDS and LVIF depends on the external supplied VDDA level
W
R
APICLK
Low-voltage Detect Status Bit — This read-only status bit reflects the voltage level on VDDA. Writes have no effect.
Low-voltage Interrupt Enable Bit
Low-voltage Interrupt Flag — LVIF is set to 1 when LVDS status bit changes. This flag can only be cleared by writing a 1.
Writing a 0 has no effect. If enabled (LVIE = 1), LVIF causes an interrupt request.
0
0
7
Autonomous Periodical Interrupt Control Register (CPMUAPICTL)
0
1
0
1
0
1
Figure 88. Autonomous Periodical Interrupt Control Register (CPMUAPICTL)
Input voltage
Input voltage
Interrupt request is disabled.
Interrupt will be requested whenever LVIF is set.
No change in LVDS bit.
LVDS bit has changed.
= Unimplemented or Reserved
0
0
0
6
= Unimplemented or Reserved
Table 365. Low Voltage Control Register (CPMULVCTL)
VDDA
VDDA
Table 366. CPMULVCTL Field Descriptions
is above level V
is below level V
MM912_634 Advance Information, Rev. 4.0
0
0
0
5
LVIA
LVID
APIES
0
0
and FPM.
4
or RPM.
Description
APIEA
0
3
0
APIFE
U
0
2
APIE
0
0
1
APIF
U
0
0
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