STM32W108C8U64TR STMicroelectronics, STM32W108C8U64TR Datasheet - Page 166
STM32W108C8U64TR
Manufacturer Part Number
STM32W108C8U64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U64TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Analog-to-digital converter
11.3.5
11.3.6
11.3.7
166/207
31
15
31
15
31
15
Reserved
30
14
30
14
30
14
Bits [12:0] ADC_DMABEG: ADC buffer start address.
Reserved
ADC DMA status register (ADC_DMASTAT)
Address offset: 0xD014
Reset value:
ADC DMA begin address register (ADC_DMABEG)
Address offset: 0xD018
Reset value:
ADC DMA buffer size register (ADC_DMASIZE)
Address offset: 0xD01C
Reset value:
Bit 1 ADC_DMAOVF: DMA overflow: occurs when an ADC result is ready and the DMA is not active.
Bit 0 ADC_DMAACT: DMA status: reads 1 if DMA is active.
29
13
29
13
29
13
Cleared by DMA reset.
Caution: This must be an even address - the least significant bit of this register is fixed at zero
by hardware.
28
12
28
12
28
12
27
11
27
11
27
11
0x0000 0000
0x2000 0000
0x0000 0000
26
10
26
10
26
10
25
25
25
9
9
9
Reserved
Doc ID 018587 Rev 1
24
24
24
8
8
8
Reserved
Reserved
Reserved
23
23
23
7
7
7
ADC_DMABEG
ADC_DMASIZE_FIELD
22
22
22
6
6
6
rw
rw
21
21
21
5
5
5
20
20
20
4
4
4
19
19
19
3
3
3
18
18
18
2
2
2
STM32W108C8
MAOVF
ADC_D
17
17
17
1
1
1
r
MAACT
ADC_D
16
16
16
0
0
0
r
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