NCT6627UD Nuvoton Technology Corporation of America, NCT6627UD Datasheet - Page 165

• Manufacturer Part Number: NCT6627UD
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of NCT6627UD

• Lead Free Status / Rohs Status: Supplier Unconfirmed

There are two different channels to set up/access the GPIO ports. The first one is the indirect access via register
2E/2F (4E/4F, it depends by HEFRAS trapping). The registers can be read / written only when the respective
logical device ID and port number are selected.
The other is the direct access through GPIO register table that can be configured by {CR61, CR60} of logic device
8. The mapped 5 registers are defined in table 11.2. Since the base address is set, the GPIO number can be
selected by writing the group number to GSR [INDEX] (GPIO Select Register, #1~#6 for GPIO1 ~ GPIO6
respectively; #0 and #7 is invalid for GSR [INDEX]). Then the I/O register, the Data register and the Inversion
register are mapped to addresses Base+0, Base+1 and Base+2 respectively. Only one GPIO can be accessed at
one time.
ADDRESS
Base + 0
Base + 1
Base + 2
Base + 3
Base + 4
ABBR
GSR
DAT
DST
IOR
INV
7
6
Table 16-2 GPIO Register Addresses
Reserved
5
GPIO Inversion Register
GPIO Status Register
GPIO Data Register
GPIO I/O Register
BIT NUMBER
4
-156-
W83627UHG/NCT6627UD
3
Publication Release Date: October 26, 2010
2
INDEX
1
0
Revision 1.7