ATTINY12L-4SU Atmel, ATTINY12L-4SU Datasheet - Page 23

Microcontrollers (MCU) AVR 1K FLASH 64B EE 3V 4MHZ

ATTINY12L-4SU

Manufacturer Part Number
ATTINY12L-4SU
Description
Microcontrollers (MCU) AVR 1K FLASH 64B EE 3V 4MHZ
Manufacturer
Atmel
Datasheet

Specifications of ATTINY12L-4SU

Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
1 KB
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500
Minimum Operating Temperature
- 40 C
Package
8SOIC EIAJ
Device Core
AVR
Family Name
ATtiny
Maximum Speed
4 MHz
Operating Supply Voltage
3.3|5 V
Interface Type
SPI
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY12L-4SU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Power-on Reset for the
ATtiny11
1006F–AVR–06/07
A Power-on Reset (POR) circuit ensures that the device is reset from power-on. As
shown in Figure 15, an internal timer is clocked from the watchdog timer. This timer pre-
vents the MCU from starting a certain period after V
Threshold Voltage – V
period – t
start-up time.The start-up times for the different clock options are shown in the following
table. The Watchdog Oscillator is used for timing the start-up time, and this oscillator is
voltage dependent as shown in the section “ATtiny11 Typical Characteristics” on page
62.
Table 8. Start-up Times for the ATtiny11 (V
If the built-in start-up delay is sufficient, RESET can be connected to V
an external pull-up resistor. By holding the RESET pin low for a period after V
been applied, the Power-on Reset period can be extended. Refer to Figure 18 for a tim-
ing example on this.
Selected Clock Option
External Crystal
External Ceramic Resonator
External Low-frequency Crystal
External RC Oscillator
Internal RC Oscillator
External Clock
TOUT
. The FSTRT fuse bit in the Flash can be programmed to give a shorter
POT
. See Figure 17. The total reset period is the Delay Time-out
FSTRT Unprogrammed
4.2 ms
4.2 ms
4.2 ms
67 ms
67 ms
CC
4.2 s
= 2.7V)
Start-up Time t
CC
has reached the Power-on
2 clocks from power-down
FSTRT Programmed
ATtiny11/12
5 clocks from reset,
TOUT
4.2 ms
4.2 ms
67 µs
67 µs
CC
4.2 s
directly or via
CC
has
23

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