ZLF645S0P2064G Zilog, ZLF645S0P2064G Datasheet - Page 39

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ZLF645S0P2064G

Manufacturer Part Number
ZLF645S0P2064G
Description
Microcontrollers (MCU) 64K Flash 512B RAM 20 pin
Manufacturer
Zilog
Datasheet

Specifications of ZLF645S0P2064G

Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
512 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-20
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
Table 14. Port 0/1 Mode Register (P01M)
PS026407-0408
Bit
Field
Reset
R/W
Address
Bit Position
[7]
[6]
[5:4]*
[3]
[0]
*
For package types other than the 48-pin package, writes to bit 3 have no effect.
*
Port 0/1 Mode Register
Note:
Reserved
The Port 0/1 Mode register (see
Port 1. The Port 0 direction is nibble-programmable. Bit 6 controls the upper nibble of
Port 0, bits [7:4]. Bit 0 controls the lower nibble of Port 0, bits [3:0]. The Port 1 direction
is byte programmable.
Only P00, P01, and P07 are available for ZLF645 Flash MCU 20-pin configuration.
Value
X
7
0
0
1
0
1
0
1
Description
Reserved—Must be written to 1. Reads 1b.
P07:P04 Mode
Output
Input
Reserved—Must be written to 1. Reads 1’s.
Port 1 Mode
Output
Input
P00:P03 Mode
Output
Input
P07:P04 Mode
W
6
1
Bank Independent: F8h; Linear: 0F8h
Reserved
X
5
Table
X
4
14) determines the I/O direction of Port 0 and
Port 1 Mode
W
3
1
ZLF645 Series Flash MCUs
Reserved
X
2
Product Specification
X
1
Port 0/1 Mode Register
P03:P00 Mode
W
0
1
31

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