ZLF645E0P2832G Zilog, ZLF645E0P2832G Datasheet - Page 160

• Manufacturer Part Number: ZLF645E0P2832G
• Description: Microcontrollers (MCU) 32K Flash 1K RAM 28 pin
• Manufacturer: Zilog

Specifications of ZLF645E0P2832G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 1 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-28
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

Z8 LXMC CPU Programming Summary
.
Table 75. Symbolic Notation for Operands
PS026407-0408
Symbol
cc
IM
r1
r2
rr1
rr2
R1
R2
Addressing Notation
Assembly
Operand
–
#n
R n
RR n
%
aa
The following sections provide a summary of information useful for programming the
Z8 LXMC CPU included in this device. For more details on the Z8 LXMC CPU and its
instruction set, refer to Z8
Table 75
variable n represents a decimal number; aa represents a hexadecimal address; and LABEL
represents a label defined elsewhere in the assembly source.
In reference notation, only lowercase is used to distinguish 4-bit addressed working
registers (r1, r2) from 8-bit addressed registers (R1, R2). The numerals 1 and 2,
respectively, indicate whether the register is used for destination or source addressing.
summarizes Z8 LXMC CPU addressing modes and symbolic notation. The text
Description
Condition Code
cc represents a condition code mnemonic. See
Immediate Data
IM represents an Immediate Data value, prefixed by # in assembly language
where n = 0 to 255.
The immediate value follows the instruction opcode in Program Memory.
Working Register
r1 or r2 represents the name, R
The equivalent 12-bit address is {RP[3:0], RP[7:4], n }.
Working Register Pair
rr1 or rr2 represents the name, R
n = 0, 2, 4,..., 14. The equivalent 12-bit address is {RP[3:0], RP[7:4], n }.
Register
R1 or R2 represents an 8-bit register address. For addresses 00h–DFh or
F0h–FFh , the equivalent 12-bit address is {RP[3:0], %
E0h–EFh (escaped mode), the equivalent 12-bit address is
{RP[3:0], RP[7:4], %
®
LXMC CPU Core User Manual (UM0215).
aa
[3:0]}.
n
, of a working register, where n = 0, 1, 2,..., 15.
n
, of a working register pair, where
Z8 LXMC CPU Programming Summary
Condition Codes on page
ZLF645 Series Flash MCUs
Product Specification
aa
}. For addresses
156.
152