ZLF645E0P2832G Zilog, ZLF645E0P2832G Datasheet - Page 84

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ZLF645E0P2832G

Manufacturer Part Number
ZLF645E0P2832G
Description
Microcontrollers (MCU) 32K Flash 1K RAM 28 pin
Manufacturer
Zilog
Datasheet

Specifications of ZLF645E0P2832G

Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
1 KB
Interface Type
ICP, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Minimum Operating Temperature
0 C
Lead Free Status / Rohs Status
 Details
Flash Byte Programming Interface
Enabling The Flash Byte Programming Interface
Flash Byte Programming Interface Flash Access Restrictions
PS026407-0408
Note:
Using the ZLF645’s Flash Byte Programming interface, the on-chip Flash controller can
be bypassed, allowing direct control of the Flash signals through registered values of
certain of the ZLF645’s GPIO pins. Bypassing the Flash controller allows faster row
programming algorithms to be used by controlling the Flash programming signals directly.
This method is beneficial when programming a large number of devices and can be used
for Flash programming by third party vendors who manufacture gang programmers. For
more information on how to use this interface, refer to Third-Party Flash Programming
Support for Z8 Crimzon Flash Parts, available for download at www.zilog.com.
The Flash Byte Programming Interface is enabled by writing three bytes to the ICP
interface:
1. 80H — initiates auto-baud calculation of the ICP interface data and clock rate.
2. F0H — ICP Write Test Mode Register command.
3. 04H — Data to be written to the Test Mode Register. This enables the Flash Byte
Since Flash Byte Programming Interface is enabled with the ZLF645 MCU in ICP mode,
the CPU clock will stop and no CPU accesses to the Flash memory will occur.
The types of Flash access allowed to the Flash memory through the Flash Byte
Programming interface is qualified similar to the ICP, by the settings of the Flash Memory
Protection Bits in User Option Byte 1. If either of the Flash protect bits are set, the
program memory has to be mass erased before full read/program access is allowed to
either the main memory or Information area page 3 sections of the Flash memory, respec-
tively. Flash memory access allowed through the Flash Byte Programming interface is
summarized in
Programming interface.
Table
41.
ZLF645 Series Flash MCUs
Flash Byte Programming Interface
Product Specification
76

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