DS1990A-F3 Maxim Integrated Products, DS1990A-F3 Datasheet - Page 5

• Manufacturer Part Number: DS1990A-F3
• Description: Serial Number Registration
• Manufacturer: Maxim Integrated Products

Specifications of DS1990A-F3

• Lead Free Status / Rohs Status: No

Figure 4. HARDWARE CONFIGURATION
INITIALIZATION
All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a
reset pulse transmitted by the bus master followed by presence pulse(s) transmitted by the slave(s). The presence
pulse lets the bus master know that the DS1990A is on the bus and is ready to operate. For more details, see the
1-Wire Signaling section.
1-Wire ROM FUNCTION COMMANDS
Once the bus master has detected a presence, it can issue one of ROM function commands that the DS1990A
supports. All ROM function commands are 8 bits long. A list of these commands follows (see flowchart in Figure 5).
READ ROM [33h]
This command allows the bus master to read the DS1990A’s 8-bit family code, unique 48-bit serial number, and 8-
bit CRC. This command can only be used if there is a single slave device on the bus. If more than one slave is
present on the bus, a data collision will occur when all slaves try to transmit at the same time (open drain will pro-
duce a wired-AND result). The resultant family code and 48-bit serial number will result in a mismatch of the CRC.
SEARCH ROM [F0h]
When a system is initially brought up, the bus master might not know the number of devices on the 1-Wire bus or
their registration numbers. By taking advantage of the wired-AND property of the bus, the master can use a
process of elimination to identify the registration numbers of all slave devices. For each bit of the registration
number, starting with the least significant bit, the bus master issues a triplet of time slots. On the first slot, each
slave device participating in the search outputs the true value of its registration number bit. On the second slot,
each slave device participating in the search outputs the complemented value of its registration number bit. On the
third slot, the master writes the true value of the bit to be selected. All slave devices that do not match the bit
written by the master stop participating in the search. If both of the read bits are zero, the master knows that slave
devices exist with both states of the bit. By choosing which state to write, the bus master branches in the ROM
code tree. After one complete pass, the bus master knows the registration number of a single device. Additional
passes identify the registration numbers of the remaining devices. Refer to App Note 187: 1-Wire Search Algorithm
for a detailed discussion, including an example.
HOST CPU
SIMPLE BUS MASTER
RX
TX
DS2480B BUS MASTER
Serial
Port
Open Drain
serial out
serial in
Port Pin
VDD
POL
RXD
TXD
DS2480B
RX = Receive
TX = Transmit
GND
VPP
1-W
NC
V
5 of 8
R
PUP
PUP
+5V
To 1-Wire data
DATA
DS1990A 1-Wire PORT
100 W
MOSFET
RX
TX