MCIMX536AVV8C Freescale Semiconductor, MCIMX536AVV8C Datasheet - Page 134

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MCIMX536AVV8C

Manufacturer Part Number
MCIMX536AVV8C
Description
IC, 32-BIT MPU, 800 MHz, 529-BGA
Manufacturer
Freescale Semiconductor
Series
ARM Cortex-A8r
Datasheets

Specifications of MCIMX536AVV8C

Core Size
32bit
Program Memory Size
288KB
Cpu Speed
800MHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
0.8V To 1.15V
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Electrical Characteristics
134
SS47
SS48
SS49
SS50
SS51
ID
Oversampling clock period
Oversampling clock high period
Oversampling clock rise time
Oversampling clock low period
Oversampling clock fall time
All the timings for the SSI are given for a non-inverted serial clock
polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have
been inverted, all the timing remains valid by inverting the clock signal
STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables
and in the figures.
All timings are on Audiomux Pads when SSI is being used for data
transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
The terms WL and BL refer to Word Length (WL) and Bit Length (BL).
For internal Frame Sync operation using external clock, the FS timing is
same as that of Tx Data (for example, during AC97 mode of operation).
i.MX53xA Automotive and Infotainment Applications Processors, Rev. 1
Table 83. SSI Receiver Timing with Internal Clock (continued)
Parameter
Oversampling Clock Operation
NOTE
15.04
Min
6.0
6.0
Freescale Semiconductor
Max
3.0
3.0
Unit
ns
ns
ns
ns
ns

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