AD9480-LVDS/PCBZ Analog Devices Inc, AD9480-LVDS/PCBZ Datasheet - Page 12

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AD9480-LVDS/PCBZ

Manufacturer Part Number
AD9480-LVDS/PCBZ
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9480-LVDS/PCBZ

Lead Free Status / Rohs Status
Supplier Unconfirmed
AD9480
Figure 10. SNR, SINAD, SFDR vs. Sample Clock Frequency, A
–10
–20
–30
–40
–50
–60
–70
–80
–90
75
70
65
60
55
50
45
40
80
70
60
50
40
30
20
10
0
0
–70
Figure 11. SFDR vs. A
0
0
SFDRdBFS
SFDRdBc
F1, F2 = –7dBFS
2F2-F1 = –71.1dBc
2F1-F2 = –68dBc
SINAD
SNR
Figure 12. Two-Tone Intermodulation Distortion
–60
(69.3 MHz and 70.3 MHz; f
20
50
SFDR
ANALOG INPUT DRIVE LEVEL (dBFS)
65dB
REF LINE
–50
100
IN
40
SAMPLE CLOCK (MHz)
Input Level; A
–40
60
MHz
150
IN
–30
S
= 250 MSPS)
= 70 MHz @ 250 MSPS
80
200
–20
IN
= 70 MHz @ −1 dBFS
100
250
–10
120
Rev. A | Page 12 of 28
300
0
Figure 13. I
Figure 15. SNR, SINAD, and SFDR vs. VREF in External Reference Mode,
50.0
47.5
45.0
42.5
40.0
180
160
140
120
100
80
60
40
20
50
49
48
47
46
45
44
43
42
41
40
0
0.5
20
0
AVDD
Figure 14. SNR, SINAD vs. Clock Pulse Width High,
A
0.7
and I
IN
DCS ON
= 70 MHz @ –1 dBFS, 250 MSPS, DCS On/Off
50
30
DRVDD
A
IN
I
0.9
EXTERNAL VREF VOLTAGE (V)
AVDD
CLOCK POSITIVE DUTY CYCLE (%)
= 70 MHz @ –1 dBFS, 250 MSPS
vs. Clock Rate, C
100
40
1.1
ENCODE (MSPS)
DCS OFF
1.3
SFDR
150
50
LOAD
I
DRVDD
= 5 pF A
1.5
200
60
IN
1.7
= 70 MHz @ –1 dBFS
SNR
SINAD
250
70
1.9
80
75
70
65
50
300
80