AD9480-LVDS/PCBZ Analog Devices Inc, AD9480-LVDS/PCBZ Datasheet - Page 6

• Manufacturer Part Number: AD9480-LVDS/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9480-LVDS/PCBZ

• Lead Free Status / Rohs Status: Supplier Unconfirmed

AD9480
SWITCHING SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, differential clock input, DCS enabled, unless otherwise noted.
Table 4.
Parameter
CLOCK
OUTPUT PARAMETERS
APERTURE
1
TIMING DIAGRAM
Valid time is approximately equal to minimum t
Maximum Conversion Rate
Minimum Conversion Rate
Clock Pulse Width High (t
Clock Pulse Width Low (t
Valid Time (t
Propagation Delay (t
Rise Time (t
Fall Time (t
DCO Propagation Delay (t
Data-to-DCO Skew (t
Pipeline Latency
Aperture Delay (t
Aperture Uncertainty (Jitter)
DATA
DCO+
DCO–
CLK+
CLK–
OUT
AIN
F
R
) 20% to 80%
) 20% to 80%
V
)
1
A
)
PD
PD
)
− t
EL
N–1
EH
CPD
CPD
)
)
)
)
t
EH
t
CPD
t
EL
PD
. C
LOAD
N
equals 5 pF maximum.
8 CYCLES
t
A
1/f
t
PD
S
N–8
Temp
Full
Full
Full
Full
Full
Full
Full
Full
25°C
25°C
25°C
Full
Full
Figure 2. Timing Diagram
N+1
Rev. A | Page 6 of 28
t
N–7
V
Test Level
VI
IV
IV
VI
VI
V
V
VI
IV
VI
V
V
VI
N+8
N
N+9
Min
250
1.2
1.2
1.9
1.9
0
N+1
AD9480-250
Typ
2
2
2.8
0.5
0.5
2.7
0.1
8
1.5
0.25
N+10
Max
20
3.8
3.7
0.6
N+2
N+11
Unit
MSPS
MSPS
ns
ns
ns
ns
ns
ns
ns
ns
Cycles
ns
ps rms