AD9480-LVDS/PCBZ Analog Devices Inc, AD9480-LVDS/PCBZ Datasheet - Page 4

• Manufacturer Part Number: AD9480-LVDS/PCBZ
• Manufacturer: Analog Devices Inc

Specifications of AD9480-LVDS/PCBZ

• Lead Free Status / Rohs Status: Supplier Unconfirmed

AD9480
DIGITAL SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, T
clock inputs, unless otherwise noted.
Table 2.
Parameter
CLOCK INPUTS (CLK+, CLK−)
LOGIC INPUTS (PDWN, S1)
DIGITAL OUTPUTS
1
2
3
The common mode for CLOCK inputs can be externally set, such that 0.9 V < CLK ± < 2.6 V.
S1 is a multilevel logic input, see Ta
LVDSBIAS resistor = 3.74 kΩ.
Differential Input
Common-Mode Voltage
Input Resistance
Input Capacitance
PDWN Logic 1 Voltage
PDWN Logic 0 Voltage
PDWN Logic 1 Input Current
PDWN Logic 0 input Current
PDWN, S1 Input Resistance
PDWN, S1 Input Capacitance
Differential Output Voltage (V
Output Offset Voltage (V
Output Coding
2
1
OS
)
ble 8
OD
)
.
3
MIN
= −40°C, T
MAX
= +85°C, A
Temp
Full
Full
Full
25°C
Full
Full
Full
Full
25°C
25°C
Full
Full
Full
Rev. A | Page 4 of 28
IN
V
IV
Test Level
IV
VI
VI
V
IV
IV
VI
VI
V
VI
VI
= −1 dBFS, full scale = 1.0 V, internal reference, differential analog and
Min
200
1.4
4.2
2.0
247
1.125
Twos complement or binary
AD9480-250
Typ
1.5
5.5
4
30
4
Max
1.68
6.0
0.8
±160
10
454
1.375
mV p-p
µA
kΩ
pF
mV
Unit
V
kΩ
pF
V
V
µA
V