ADV7311KST Analog Devices Inc, ADV7311KST Datasheet - Page 57

• Manufacturer Part Number: ADV7311KST
• Description: IC VID ENC 6-12BIT DAC'S 64LQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7311KST

• Rohs Status: RoHS non-compliant
• Applications: DVD, SD/HD
• Voltage - Supply, Analog: 2.5V
• Voltage - Supply, Digital: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 2.375V To 2.625V
• Operating Temperature Range: 0°C To +70°C
• Tv / Video Case Style: LQFP
• No. Of Pins: 64
• Msl: MSL 1 - Unlimited
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCB Board Layout Considerations
The ADV7310/ADV7311 are optimally designed for lowest noise
performance, both radiated and conducted noise. To complement
the excellent noise performance of the ADV7310/ADV7311, it
is imperative that great care be given to the PC board layout.
The layout should be optimized for lowest noise on the ADV7310/
ADV7311 power and ground lines. This can be achieved by
shielding the digital inputs and providing good decoupling.
The lead length between groups of V
DGND, and V
as possible to minimized inductive ringing.
It is recommended that a 4-layer printed circuit board is used,
with power and ground planes separating the layer of the signal
carrying traces of the components and solder side layer. Com-
ponent placement should be carefully considered in order to
separate noisy circuits, such as crystal clocks, high speed logic
circuitry, and analog circuitry.
There should be a separate analog ground plane and a separate
digital ground plane.
Power planes should encompass a digital power plane and an
analog power plane. The analog power plane should contain the
DACs and all associated circuitry, V
power plane should contain all logic circuitry.
The analog and digital power planes should be individually
connected to the common power plane at a single point through
a suitable filtering device, such as a ferrite bead.
DAC output traces on a PCB should be treated as transmission
lines. It is recommended that the DACs be placed as close as
possible to the output connector, with the analog output traces
being as short as possible (less than 3 inches). The DAC termina-
tion resistors should be placed as close as possible to the DAC
outputs and should overlay the PCB’s ground plane. As well as
minimizing reflections, short analog output traces will reduce
noise pickup due to neighboring digital circuitry.
To avoid crosstalk between the DAC outputs, it is recommended
that as much space as possible be left between the tracks of the
individual DAC output pins. The addition of ground tracks
between outputs is also recommended.
REV. A
DD_IO
and GND_IO pins should be kept as short
AA
REF
and AGND, V
circuitry. The digital
DD
and
–57–
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of decoupling capacitors.
Optimum performance is achieved by the use of 10 nF and
0.1 µF ceramic capacitors. Each group of V
pins should be individually decoupled to ground. This should
be done by placing the capacitors as close as possible to the
device with the capacitor leads as short as possible, thus mini-
mizing lead inductance.
A 1 µF tantalum capacitor is recommended across the V
supply in addition to 10 nF ceramic.
See the circuit layout in Figure 61.
Digital Signal Interconnect
The digital signal lines should be isolated as much as possible
from the analog outputs and other analog circuitry. Digital
signal lines should not overlay the analog power plane.
Due to the high clock rates used, long clock lines to the
ADV7310/ADV7311 should be avoided to minimize noise
pickup.
Any active pull-up termination resistors for the digital inputs
should be connected to the digital power plane and not the
analog power plane.
Analog Signal Interconnect
The ADV7310/ADV7311 should be located as close as possible
to the output connectors, thus minimizing noise pickup and
reflections due to impedance mismatch.
For optimum performance, the analog outputs should each
be source and load terminated, as shown in Figure 61. The
termination resistors should be as close as possible to the
ADV7310/ADV7311 to minimize reflections.
For optimum performance, it is recommended that all decoupling
and external components relating to the ADV7310/ADV7311
be located on the same side of the PCB and as close as possible
to the ADV7310/ADV7311.
Any unused inputs should be tied to ground.
ADV7310/ADV7311
AA
, V
DD
, or V
AA
DD_IO