ADV7173KST Analog Devices Inc, ADV7173KST Datasheet - Page 32
![IC DAC VIDEO NTSC 6-CH 48LQFP](/photos/6/59/65923/505-48-lqfp_sml.jpg)
ADV7173KST
Manufacturer Part Number
ADV7173KST
Description
IC DAC VIDEO NTSC 6-CH 48LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet
1.ADV7173KSTZ.pdf
(60 pages)
Specifications of ADV7173KST
Rohs Status
RoHS non-compliant
Applications
Multimedia
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
48-LQFP
Number Of Dac's
6
Adc/dac Resolution
10b
Screening Level
Commercial
Package Type
LQFP
Pin Count
48
For Use With
EVAL-ADV7173EBM - BOARD EVAL FOR ADV7173
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant
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ADV7172/ADV7173
MODE REGISTER 6 MR6 (MR67–MR60)
(Address (SR4–SR0) = 06H)
Mode Register 6 is an 8-bit-wide register. Figure 50 shows the
various operations under the control of Mode Register 6.
MR6 BIT DESCRIPTION
Power-Up Sleep Mode Control (MR60)
After reset this bit is set to “0,” if both SCRESET/RTC and
NTSC_PAL pins are tied high, the part will power-up in sleep
mode (to facilitate low power consumption before the I
initialized). When this bit is set to “1” (via the I
control passes to Mode Register 2, Bit 7.
Reserved (MR61)
A Logic “0” must be written to this bit.
Luma Autodetect Control (MR62)
This bit controls which mode of autodetect operation is being
used on the luma DAC (DAC B) on the ADV7172/ADV7173.
If this bit is set (“0”), Mode 0 is on; if this bit is set (“1”), then
Mode 1 is being used.
Composite Autodetect Control (MR63)
This bit controls which mode of autodetect operation is being
used on the composite DAC (DAC A) on the ADV7172/
ADV7173. If this bit is set (“0”), Mode 0 is on; if this bit is set
(“1”), then Mode 1 is being used.
MR67
0
1
DAC STATUS BIT
COMPOSITE
NOT TERMINATED
TERMINATED
MR66
MR67
0
1
STATUS BIT
NOT TERMINATED
TERMINATED
LUMA DAC
MR66
2
C), sleep mode
BE WRITTEN TO
ZERO SHOULD
THIS BIT
MR65
MR65
2
C is
DAC TERMINATION
MR64
0
1
CONTROL
MR64
1
2
MODE
MODE
COMP AUTODETECT
MR63
0
1
DAC Termination Control (MR64)
This bit controls the load termination resistance detected by the
autodetect functionality. If this bit is set (“0”), the autodetect
feature is used to determine if a 75 Ω termination is present. If
this bit is set to (“1”), the autodetect feature is used to indicate
if a 150 Ω termination is present.
Reserved (MR65)
A Logic “0” must be written to this bit.
Luma DAC Status Bit (MR66)
This bit is a read-only status bit for the autodetect feature of
the ADV7172/ADV7173 and may be read to check whether
or not the composite DAC is terminated. If this bit is set (“1”),
there is no termination; if this bit is set (“0”), the composite DAC
is terminated.
Composite DAC Status Bit (MR67)
This bit is a read only status bit for the autodetect feature of the
ADV7172/ADV7173 and may be read to check whether or not
the luma DAC is terminated. If this bit is set (“1”), there is no
termination. If this bit is set (“0”), the luma DAC is terminated.
CONTROL
MR63
MODE 0
MODE 1
LUMA AUTODETECT
MR62
0
1
CONTROL
MR62
MODE 0
MODE 1
BE WRITTEN TO
ZERO SHOULD
THIS BIT
MR61
MR61
MR60
POWER-UP SLEEP
MODE CONTROL
0
1
MR60
ENABLE
DISABLE