Z0220112VSGR4078 Zilog, Z0220112VSGR4078 Datasheet - Page 12

• Manufacturer Part Number: Z0220112VSGR4078
• Description: IC MODEM 2400BPS DSP AFE 44-PLCC
• Manufacturer: Zilog

Specifications of Z0220112VSGR4078

• Data Format: V.21, V.22, V.23, Bell 103, Bell 212A
• Baud Rates: 2.4k
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Functions
PS000904-0107
Table 1. Z02201 Pin Assignments (Continued)
HD7–HD0 Host Data Bus (Bidirectional, Active High)—
bit bidirectional data bus used for the transfer of control and status information.
HCS Host Chip Select (Input, Active Low)—
the data pump and the host is enabled. Data transfers to the data pump registers
are 8 bits wide.
HWR Host Write Enable Strobe (Input, Active Low)—
active Low signal that is used to initiate a write operation to the data pump. During
a write operation, data is sent to the data pump by the host via the host data bus.
HRD Host Read Enable Strobe (Input, Active Low)—
active Low signal that is used to initiate a read operation from the data pump. Dur-
ing a read operation, data is transferred out of the data pump by the host via the
host data bus.
HIRQ Host Interrupt Request (Output, Active Low)—
output that can be tied through an external pull-up resistor to the digital power
PLCC Pin LQFP Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Signal
HD2
HD3
HD4
HD5
HD6
HD7
RLSD
RxD
TClk
TxD
OH
RTS
Test2/RClk
Xtal
Extal
Vdd
Direction
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Output
Output
Output
Input
Output
Input
Input/Output
Output
Input
V.22BIS Data Pump with Integrated AFE
When CS is Low, data transfer between
The read enable strobe is an
The HIRQ is an open-drain
The write enable strobe is an
HD0–HD7 constitutes an 8-
8