SI2493-C-FS Silicon Laboratories Inc, SI2493-C-FS Datasheet - Page 84

• Manufacturer Part Number: SI2493-C-FS
• Description: IC ISOMODEM SYSTEM-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2493-C-FS

• Mfg Application Notes: SI2493/57/34/15/04, Appl Note AN93
• Data Format: V.21, V.22, V.23, V.29, V.32, V.34, V.90, V.92, Bell 103, Bell 212A
• Baud Rates: 56k
• Interface: UART
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AN93
3.3.25. U53 (Modem Control Register 2)
U53 (MOD2) is a bit-mapped register with all bits,
except bit 15, reserved (see Table 52). The AT&H11
command sets the V.23 1200/75 bps mode. Bit 15
(REV) is used to enable V.23 reversing. This bit is set to
0
enables reversing transmit and receive speeds.
Reversing is initiated by the modem in the “origination
mode” (low speed TX and high speed RX). U53 resets
to 0x0000 with a power-on or manual reset.
3.3.26. U54 (CALT)
U54 (CALT) sets the time between off-hook and DAA
calibration if timed calibration is enabled with the TCAL
bit (U7D, bit 12). The OHCT bits (15:8) control this
timing in 32 ms units.
84
15:12
b
14:0
15:8
10:9
Bit
Bit
7:0
Bit
7:3
15
11
8
2
1
0
(disable reversing) by default. Setting this bit to 1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
OHCT
Name
Name
REV
Name
OHS2
FOH
DL
Function
V.23 Reversing.
0 = Disable.
1 = Enable.
Read returns zero.
Function
Off-hook to calibration timing in 32 ms units. If enabled with TCAL (U7D bit 12), this value
controls the time between off-hook and DAA calibration.
Must be set to zero.
Function
Must be set to zero.
Must be set to one.
Must be set to zero.
On-Hook Speed 2.
Note: The +GCI command does not modify OHS2, SQ[1:0].
Must be set to zero.
0 = Automatic calibration timer set to 426 ms.
1 = Automatic calibration timer set to 106 ms.
0 = Digital loopback beyond ISOcap™ interface.
1 = Digital loopback across ISOcap interface only.
Must be set to zero.
This bit, in combination with the OHS bit and the SQ[1:0] bits on-hook speeds specified
are measured from the time the OH bit is cleared until loop current equals zero.
OHS
1
0
0
OHS2
0
1
X
Table 47. U53 Bit Map
Table 48. U54 Bit Map
Table 49. U62 Bit Map
SQ[1:0]
00
00
11
Rev. 0.9
b
Mean On-Hook Speed
3.3.27. U62 (DAAC1)
U62 (DAAC1) is a bit-mapped register with only bits 1,
2, and 8 available. All other bits in this register are
reserved and must be set according to Table 49. U62
resets to 0x0804 with a power-on or manual reset.
Bit 1 (DL) = 1 or 0 causes digital loopback to occur
beyond the isolation capacitor interface out to and
including the analog hybrid circuit. Setting bit 1 to 1
enables digital loopback across the isolation barrier
only. This setting is used in conjunction with the AT&H
and AT&T3 commands. DL must be set to “0” for normal
operation.
Bit 2 (FOH) controls when automatic Si3018/10
calibration takes place.
Less than 0.5 ms
3 ms ±10% (meets ETSI standard)
26 ms ±10% (meets Australia spark quenching spec)