AD9822JRSZ Analog Devices Inc, AD9822JRSZ Datasheet - Page 4

IC CCD SIGNAL PROC 14BIT 28SSOP

AD9822JRSZ

Manufacturer Part Number
AD9822JRSZ
Description
IC CCD SIGNAL PROC 14BIT 28SSOP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 14-Bitr
Datasheet

Specifications of AD9822JRSZ

Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Current - Supply
73mA
Mounting Type
Surface Mount
Package / Case
28-SSOP
Supply Voltage Range
3V To 5.25V, 4.75V To 5.25V
Power Dissipation Pd
450mW
Ic Mounting
SMD
Tv / Video Case Style
SSOP
No. Of Pins
28
Msl
MSL 3 - 168 Hours
Termination Type
SMD
Filter Terminals
SMD
Rohs Compliant
Yes
Digital Ic Case Style
SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD9822
Parameter
POWER DISSIPATION
1
2
DIGITAL SPECIFICATIONS
T
Table 2.
Parameter
LOGIC INPUTS
LOGIC OUTPUTS
RESET TRANSIENT
Linear input signal range is from 2 V to 4 V when the CCD’s reference level is clamped to 4 V by the AD9822’s input clamp.
The PGA gain is approximately linear-in-dB and follows the equation:
MIN
3-Channel Mode
1-Channel Mode
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
High Level Output Voltage
Low Level Output Voltage
High Level Output Current
Low Level Output Current
3-Channel Mode @ 6 MHz
1-Channel Mode @ 6 MHz
1V TYP
to T
MAX
, AVDD = 5 V, DRVDD = 5 V, CDS mode, f
2V p-p MAX INPUT SIGNAL RANGE
4V SET BY INPUT CLAMP (3V OPTION ALSO AVAILABLE)
ADCCLK
Gain
Rev. B | Page 4 of 20
= 15 MHz, f
Symbol
V
V
I
I
C
V
V
I
I
=
IH
IL
OH
OL
IH
IL
IN
OH
OL
[
Min
1
+
4
7 .
5
7 .
63
CDSCLK1
63
G
]
= f
where G is the register value. See Figure
CDSCLK2
Typ
385
335
300
250
Min
2.0
4.5
= 5 MHz, C
Typ
10
10
10
50
50
L
= 10 pF, unless otherwise noted.
Max
450
410
Max
0.8
0.1
15
.
Unit
mW
mW
mW
mW
Unit
V
V
µA
µA
pF
V
V
µA
µA

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