DS10BR150TSD/NOPB National Semiconductor, DS10BR150TSD/NOPB Datasheet

IC BUFFER/REPEATER LVDS 8-LLP

DS10BR150TSD/NOPB

Manufacturer Part Number
DS10BR150TSD/NOPB
Description
IC BUFFER/REPEATER LVDS 8-LLP
Manufacturer
National Semiconductor
Type
Bufferr
Datasheet

Specifications of DS10BR150TSD/NOPB

Tx/rx Type
LVDS
Delay Time
380ps
Capacitance - Input
1.7pF
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
21mA
Mounting Type
Surface Mount
Package / Case
8-LLP
Number Of Elements
1
Number Of Receivers
1
Number Of Drivers
1
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
100mV
Diff. Input Low Threshold Volt
-100mV
Output Type
Repeater
Differential Output Voltage
450mV
Transmission Data Rate
1000Mbps
Propagation Delay Time
0.6ns
Power Dissipation
2.08W
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
8
Data Rate
1 Gbps
Operating Supply Voltage
3.3 V
Maximum Power Dissipation
2080 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current
21mA
Supply Voltage Range
3V To 3.6V
Driver Case Style
LLP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Msl
MSL 3 - 168 Hours
Filter Terminals
SMD
Logic Type
Buffer
Rohs Compliant
Yes
Data Rate Max
1Gbps
For Use With
DS10BR150EVK - BOARD EVALUATION DS10BR150
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DS10BR150TSD
DS10BR150TSDTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS10BR150TSD/NOPB
Manufacturer:
LT
Quantity:
300
© 2007 National Semiconductor Corporation
DS10BR150
1.0 Gbps LVDS Buffer / Repeater
General Description
The DS10BR150 is a single channel 1.0 Gbps LVDS buffer
optimized for high-speed signal transmission over lossy FR-4
printed circuit board backplanes and balanced cables. Fully
differential signal paths ensure exceptional signal integrity
and noise immunity.
Wide input common mode range allows the receiver to accept
signals with LVDS, CML and LVPECL levels; the output levels
are LVDS. A very small package footprint requires a minimal
space on the board while the flow-through pinout allows easy
board layout. The differential inputs and outputs are internally
terminated with a 100Ω resistor to lower device input and out-
put return losses, reduce component count and further mini-
mize board space.
Typical Application
300017
Features
Applications
DC - 1.0 Gbps low jitter, high noise immunity, low power
operation
On-chip 100Ω input and output termination minimizes
insertion and return losses, reduces component count and
minimizes board space
7 kV ESD on LVDS I/O pins protects adjoining
components
Small 3 mm x 3 mm 8-LLP space saving package
Clock and data buffering
OC-12 / STM-4
FireWire 800
30001710
November 8, 2007
www.national.com

Related parts for DS10BR150TSD/NOPB

DS10BR150TSD/NOPB Summary of contents

Page 1

... Typical Application © 2007 National Semiconductor Corporation Features ■ 1.0 Gbps low jitter, high noise immunity, low power operation ■ ...

Page 2

Block Diagram Pin Diagram Pin Descriptions Pin Name Pin Name NC 1 IN OUT- 6 OUT+ 7 VCC 8 GND DAP Ordering Code NSID DS10BR150TSD www.national.com 30001701 30001702 Pin Type Pin Description NA ...

Page 3

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( LVDS Input Voltage (IN+, IN−) LVDS Differential Input Voltage ((IN+) - (IN−)) LVDS Output Voltage (OUT+, OUT−) LVDS Differential Output Voltage ((OUT+) - (OUT−)) ...

Page 4

AC Electrical Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 5, 7) Symbol Parameter LVDS OUTPUT AC SPECIFICATIONS (OUT+, OUT-) t Differential Propagation Delay High to Low PHLD2 t Differential Propagation Delay Low to High PLHD2 ...

Page 5

DC Test Circuits AC Test Circuits and Timing Diagrams FIGURE 1. Differential Driver DC Test Circuit FIGURE 2. Differential Driver AC Test Circuit FIGURE 3. Propagation Delay Timing Diagram FIGURE 4. LVDS Output Transition Times 5 30001720 30001721 30001722 30001723 ...

Page 6

FIGURE 5. Jitter Measurements Test Circuit 6 30001729 ...

Page 7

Device Operation INPUT INTERFACING The DS10BR150 accepts differential signals and allows simple coupling. With a wide common mode range, the DS10BR150 can be DC-coupled with all common differential drivers (i.e. LVPECL, LVDS, CML). The following three figures ...

Page 8

OUTPUT INTERFACING The DS10BR150 outputs signals are compliant to the LVDS standard. It can be DC-coupled to most common differential receivers. The following figure illustrates typical DC-coupled interface to common differential receivers and assumes that the receivers have high impedance ...

Page 9

Typical Performance A 622 Mbps NRZ PRBS-7 Output Eye Diagram V:100 mV / DIV, H:200 ps / DIV Total Jitter as a Function of Input Amplitude 30001730 A 1062.5 Mbps NRZ PRBS-7 Output Eye Diagram V:100 mV / DIV, H:150 ...

Page 10

Physical Dimensions (See AN-1187 for PCB Design and Assembly Recommendations) www.national.com inches (millimeters) unless otherwise noted Order Number DS10BR150TSD NS Package Number SDA08A 10 ...

Page 11

Notes 11 www.national.com ...

Page 12

... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock Conditioners www.national.com/timing Data Converters www.national.com/adc Displays www.national.com/displays Ethernet www.national.com/ethernet Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www ...

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