PI2EQX4432DZDE Pericom Semiconductor, PI2EQX4432DZDE Datasheet - Page 2

• Manufacturer Part Number: PI2EQX4432DZDE
• Description: IC PCI-E REPEATER 48TQFN
• Manufacturer: Pericom Semiconductor
• Type: Repeaterr

Specifications of PI2EQX4432DZDE

• Tx/rx Type: CML
• Voltage - Supply: 1.7 V ~ 1.9 V
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Delay Time: -
• Capacitance - Input: -
• Lead Free Status / Rohs Status: Details

Pin Description
41, 40, 39, 38
43, 42, 20, 21
47, 46, 16, 17
45, 44, 18, 19
14, 15
22, 23
Pin #
07-0106
36
35
33
32
30
29
27
26
10
11
13
1
2
4
5
7
8
EN_[A, B,
Pin Name
SEL–DE_
SEL–EQ_
SEL–OL_
EN_CLK
CLKO–
CLKO,
[A:D]
[A:D]
[A:D]
CLK+,
C, D]
AO+
DO+
CLK–
BO+
CO+
AO-
DO-
AI+
BO-
CO-
DI+
BI+
CI+
AI-
DI-
BI-
CI-
I/O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
Negative CMLOutput Channel C with internal 50 Ohm pull up during normal opera-
tion and 2k–Ohm pull up otherwise.
Positive CML Input Channel D with internal 50 Ohm pull down during normal opera-
tion (EN_D = 1). When EN_D = 0, this pin is a high-impedance.
Negative CML Input Channel D with internal 50 Ohm pull down during normal op-
eration (EN_D = 1). When EN_D = 0, this pin is a high-impedance.
Positive CML Output Channel D with internal 50 Ohm pull up during normal opera-
tion and 2k–Ohm pull up otherwise.
Negative CML Output Channel D with internal 50Ω pull up during normal operation
and 2k–Ohm pull up otherwise.
EN_[A:D] is a channel enable pin with internal 50k–Ohm pull-up resistor. ALVCMOS
high provides normal operation. ALVCMOS low selects a low power down mode.
Output De–Emphasis confi guration input for channels A, B, C and D, with internal
50k–Ohm pull up.Refer to table for modes.
Equalizer confi guration input for channels A, B, C and D, with internal 50k–Ohm
pull-up. Refer to table for modes.
Output Level confi guration input for channels A, B, C, and D, with internal 50k–Ohm
pull–up. Refer to table for modes.
Differential input reference clock, typically 100MHz
Differential reference clock output
Enable Clock input with 50K–Ohm pull-up. When EN_CLK is LVCMOS high level,
the clock output operates normally. When EN_CLK = low, the clock outputs are
turned off for power savings. A clock is not required bt the data channels for opera-
tion.
Positive CML Input Channel A with internal 50 Ohm pull down during normal opera-
tion (EN_A = 1). When EN_A = 0, this pin is a high-impedance.
Negative CML Input Channel A with internal 50 Ohm pull down during normal op-
eration (EN_A = 1). When EN_A =0, this pin is a high-impedance.
Positive CML Output Channel A internal 50 Ohm pull up during normal operation and
2KΩ pull up otherwise.
Negative CML Output Channel A with internal 50 Ohm pull up during normal opera-
tion and 2K-ohm pull up otherwise.
Posite CML Input Channel B with internal 50 Ohm pull down during normal opera-
tion (EN_B = 1). When EN_B = 0, this pin is a high-impedance.
Negative CML Input Channel B with internal 50 Ohm pull down during normal opera-
tion (EN_B = 1). When EN_B = 0, this pin is a high-impedance.
Positive CML Output Channel B with internal 50 Ohm pull up during normal opera-
tion and 2k–Ohm pull up otherwise.
Negative CMLOutput Channel B with internal 50 Ohm pull up during normal opera-
tion and 2k–Ohm pull up otherwise.
Positive CML Input Channel C with internal 50 Ohm pull down during normal opera-
tion (EN_C = 1). When EN_C = 0, this pin is a high-impedance.
Negative CML Input Channel C with internal 50 Ohm pull down during normal opera-
tion (EN_C = 1). When EN_C = 0, this pin is a high-impedance.
Positive CMLOutput Channel C with internal 50 Ohm pull up during normal opera-
tion and 2K-ohm pull up otherwise.
2
2.5Gbps x2 Lane PCI Express Repeater / Equalizer
with Signal Detect and Flow-through Pinout
Description
PI2EQX4432D
PS8888A
04/26/07