DS33X11+ Maxim Integrated Products, DS33X11+ Datasheet - Page 245

• Manufacturer Part Number: DS33X11+
• Description: IC MAPPING ETHERNET 144CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X11+

• Applications: Data Transport
• Interface: SPI
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 144-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

401h:
Default
10.7 VCAT/LCAS Registers
10.7.1 Transmit VCAT Registers
Note: Some registers are on a per-WAN-port basis.
Register Name:
Register Description:
Register Address:
400h:
Default
Bit 11: Transmit GID Bit Convention (TGIDBC) Controls all 4 VCGs. This bit is only used when TGIDM = 1
Bit 10: Transmit GID Mode (TGIDM) Controls all 4 VCGs.
Bit 9: Transmit Configuration Change Load (TLOAD). When all WAN transmit ports have been configured with
the correct SQ assignments, CTRL commands, member count (TCR1.VnMC[3:0]), VCG assignments, and LCAS
Enable (LE[4:1]), a 0-to-1 transition on this bit will load the new configuration on the next VCAT Start of Frame
(SOF). This register will update all VCGs.
Bit 8: Transmit VCAT Block Enable (TVBLKEN) Data path Reset/Disable.
Note: This bit must be set even in Non-VCG modes
Bits 6-7: VCG4 Frame Mode Control (V4FM[1:0])
Bits 4-5: VCG3 Frame Mode Control (V3FM[1:0])
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = bit 15 of the TGIDx register is transmitted first.
1 = bit 0 of TGIDx register is transmitted first.
0 = PRBS (2
1 = User configured value. The first bit inserted will be when MFI2 = XXXX_0000.
0 = VCAT Block is disabled; data path is disabled
1 = VCAT Block is enabled; data path is enabled
00 = VCG4 configured for T1
01 = VCG4 configured for E1
10 = VCG4 configured for C-bit DS3 (MUST be mapped to Ports 1 to 8 only)
11 = VCG4 configured for E3 G.832 (MUST be mapped to Ports 1 to 8 only)
00 = VCG3 configured for T1
10 = VCG3 configured for C-bit DS3 (MUST be mapped to Ports 1 to 8 only)
11 = VCG3 configured for E3 G.832 (MUST be mapped to Ports 1 to 8 only)
01 = VCG3 configured for E1
V4FM1
Bit 15
Bit 7
0
0
-
15
– 1) pattern.
V4FM0
VCAT.TCR1
VCAT Transmit Control Register 1
400h
Bit 14
Bit 6
0
0
-
V3FM1
Bit 13
Bit 5
0
0
-
V3FM0
Bit 12
Bit 4
0
0
-
TGIDBC
V2FM1
Bit 11
Bit 3
0
0
TGIDM
V2FM0
Bit 10
Bit 2
0
0
TLOAD
V1FM1
Bit 9
Bit 1
0
0
TVBLKEN
V1FM0
245 of 375
Bit 8
Bit 0
0
0