W83627EHG Nuvoton Technology Corporation of America, W83627EHG Datasheet - Page 126
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W83627EHG
Manufacturer Part Number
W83627EHG
Description
IC I/O CONTROLLER 128-QFP
Manufacturer
Nuvoton Technology Corporation of America
Specifications of W83627EHG
Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8. FLOPPY DISK CONTROLLER
The floppy disk controller (FDC) of the W83627EHF/EHG/EF/EG integrates all of the logic required for
floppy disk control.
multi-master systems, and the digital data separator supports data rates up to 2 M bits/sec.
The FDC includes the following blocks: Precompensation, Data Rate Selection, Digital Data Separator,
FIFO, and FDC Core. The rest of this section discusses these blocks through the following topics: FIFO,
Data Separator, Write Precompensation, Perpendicular Recording mode, FDC core, FDC commands,
and FDC registers.
8.1.1
The FIFO is 16 bytes in size and has programmable threshold values. All command parameter
information and disk data transfers go through the FIFO. Data transfers are governed by the RQM
(Request for Master) and DIO (Data Input/Output) bits in the Main Status Register.
The FIFO is defaulted to disabled mode after any form of reset, which maintains PC/AT hardware
compatibility. The default values can be changed through the configure command. The advantage of
the FIFO is that it lets the system have a larger DMA latency without causing disk errors. The following
tables give several examples of the delays with the FIFO. The data are based upon the following
formula:
8.1
FDC Functional Description
FIFO (Data)
FIFO THRESHOLD
FIFO THRESHOLD
15 Byte
2 Byte
8 Byte
1 Byte
1 Byte
DELAY = THRESHOLD # x (1 / DATA RATE) * 8 - 1.5 μs
The FDC implements a FIFO which provides better system performance in
2 x 16 μs - 1.5 μs = 30.5 μs
8 x 16 μs - 1.5 μs = 6.5 μs
15 x 16 μs - 1.5 μs = 238.5 μs
1 x 8 μs - 1.5 μs = 6.5 μs
1 x 16μs - 1.5 μs = 14.5 μs
MAXIMUM DELAY UNTIL SERVICING AT 500K BPS
MAXIMUM DELAY UNTIL SERVICING AT 1M BPS
W83627EHF/EF, W83627EHG/EG
Data Rate
Data Rate
-115-
Publication Release Date: April 7, 2009
Version 1.94
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