PSD303B-70M STMicroelectronics, PSD303B-70M Datasheet - Page 23

MCU 8BIT PROGRM 70NS 44-PQFP

PSD303B-70M

Manufacturer Part Number
PSD303B-70M
Description
MCU 8BIT PROGRM 70NS 44-PQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD303B-70M

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
44-MQFP, 44-PQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
PSD303B-70M
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
PSD303B-70M
Manufacturer:
ST
0
10.
I/O Port
Functions
(
PSD3XX Family
20
cont.)
Figure 7. Port C (PC0-PC2) Pin Structure
10.4 Port C (PC0-PC2)
Each pin of Port C (Figure 7) can be configured as an input to PAD A and PAD B, or as an
output from PAD B. As inputs, the pins are referenced as A16-A18. Although the pins are
given this reference, they can be used for any address or logic input. [For example, A8-A10
could be connected to those pins to improve the resolution (boundaries) of CS0-CS7 to 256
bytes.] How they are defined in the PSDsoft design file determines:
Notes:
1) If the inputs are addresses, they are routed to PAD A and PAD B, and can be used in
2) A logic input is routed to PAD B and can be used for Boolean equations that are
Alternately, PC0-PC2 can become CS8-CS10 outputs, respectively, providing the user with
more external chip-select PAD outputs. Each of the signals (CS8-CS10) is comprised of
one product term.
NOTES: 1. Port C pins can be individually configured as inputs or outputs, but not both. Pins can be individually
10.5 ALE/AS Input Pin
The ALE/AS pin may be used as a generic logic input signal to the PADs if a
non-multiplexed MCU configuration is chosen in PSDsoft.
From PAD
To PAD
any or all PAD equations.
implemented in any or all of the CS0-CS10 PAD B outputs.
Whether they are address or logic inputs
Whether the input is transparent or latched by the trailing edge of ALE/AS.
A16/A17/A18
2. PSDsoft sets this configuration prior to run-time based on your PSDsoft design file.
configured as address or logic and latched or transparent, except for the 3X1 devices, which must be
set to all address or all logic.
Latched Address
CS8 / CS9 / C S10
Input
Logic Input
Q
En
D
ALE
PSDsoft
M
D
E
U
X
2
Set by PSDsoft
Input or Output
Chip Select Out
(PC0 /PC1/PC2)
Address In or
2
Port C I/O
1

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