EA-XPR-007 Embedded Artists, EA-XPR-007 Datasheet - Page 23
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EA-XPR-007
Manufacturer Part Number
EA-XPR-007
Description
BOARD LPCXPRESSO LPC11U14
Manufacturer
Embedded Artists
Specifications of EA-XPR-007
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
LPC11U1X
Objective data sheet
7.12.1 Features
7.13.1 Integrated oscillators
7.12 Windowed WatchDog Timer (WWDT)
7.13 Clocking and power control
7.11 System tick timer
The ARM Cortex-M0 includes a system tick timer (SYSTICK) that is intended to generate
a dedicated SYSTICK exception at a fixed time interval (typically 10 ms).
The purpose of the watchdog is to reset the controller if software fails to periodically
service it within a programmable time window.
The LPC11U1x include three independent oscillators. These are the system oscillator, the
Internal RC oscillator (IRC), and the watchdog oscillator. Each oscillator can be used for
more than one purpose as required in a particular application.
Following reset, the LPC11U1x will operate from the internal RC oscillator until switched
by software. This allows systems to operate without any external crystal and the
bootloader code to operate at a known frequency.
See
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Internally resets chip if not periodically reloaded during the programmable time-out
period.
Optional windowed operation requires reload to occur between a minimum and
maximum time period, both programmable.
Optional warning interrupt can be generated at a programmable time prior to
watchdog time-out.
Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be
disabled.
Incorrect feed sequence causes reset or interrupt if enabled.
Flag to indicate watchdog reset.
Programmable 24-bit timer with internal prescaler.
Selectable time period from (T
multiples of T
The Watchdog Clock (WDCLK) source can be selected from the IRC or the dedicated
watchdog oscillator (WDO). This gives a wide range of potential timing choices of
watchdog operation under different power conditions.
Figure 6
for an overview of the LPC11U1x clock generation.
All information provided in this document is subject to legal disclaimers.
cy(WDCLK)
Rev. 1 — 11 April 2011
4.
cy(WDCLK)
256 4) to (T
32-bit ARM Cortex-M0 microcontroller
cy(WDCLK)
LPC11U1x
2
© NXP B.V. 2011. All rights reserved.
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