ZLF645E0P2032G Zilog, ZLF645E0P2032G Datasheet - Page 60

• Manufacturer Part Number: ZLF645E0P2032G
• Description: Microcontrollers (MCU) 32K Flash 1K RAM 20 pin
• Manufacturer: Zilog

Specifications of ZLF645E0P2032G

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 1 KB
• Interface Type: ICP, UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Package / Case: PDIP-20
• Minimum Operating Temperature: 0 C
• Lead Free Status / Rohs Status: Details

PS026407-0408
Table 27. Register File Address Summary (Continued)
12-Bit
D09
D0A
D0B
D0C
D0D
D0E
D0F
D10–DFF —
F00
F01
F02
F03
F04
F05–F08 —
F09
F0A
F0B
F0C
F0D
F0E
F0F
F10–FFF —
1
16-bit stack pointer.
When ZLF645 is programmed for 16-bit stack addressability, the value in this register is used as the high byte of a
Address (Hex)
Bank 8-Bit
D
D
D
D
—
D
D
F
F
F
F
F
F
F
F
F
F
F
F
09
0A
0B
0C
—
0E
0F
—
00
01
02
03
04
—
09
0A
0B
0C
0D
0E
0F
—
Register Description
Timer 16 Capture High Register
Timer 8 Capture Low Register
Timer 8 Capture High Register
Low-Voltage Detection Register
Reserved
User Option Byte 0
User Option Byte 1
Reserved (8-Bit access goes to Bank 0) —
Port Configuration Register
Flash Control and Flash Status Register FCTL/FSTAT 0 0 0 0_0 0 0 0b
Flash Page Select and Sector Protect
Register
Flash Frequency High Byte Register
Flash Frequency Low Byte Register
Reserved
Port 4 Mode Register
Stop Mode Recovery Register 4
Stop Mode Recovery Register
Stop Mode Recovery Register 1
Stop Mode Recovery Register 2
Stop Mode Recovery Register 3
Watchdog Timer Mode Register
Reserved (8-Bit access goes to Bank 0) —
Mnemonic
HI16
LO8
HI8
—
OPT0
OPT1
PCON
FPS/FSEC
FFREQH
FFREQL
—
P4M
SMR4
SMR
SMR1
SMR2
SMR3
WDTMR
LVD
ZLF645 Series Flash MCUs
Product Specification
Reset
00h
00h
00h
1 1 1 1 _1 0 0 0 b
—
FFH
FFH
—
XXXX_1 1 1 0 b
0 0 0 0_0 0 0 0b
0 0 0 0_0 0 0 0b
0 0 0 0_0 0 0 0b
—
FFh
XXX0 _0 0 0 0 b
0 0 1 0 _0 0 0 0 b
00h
X0 X0 _0 0 XXb
X0h
0 0 0 0 _1 1 0 1 b
—
Register File Summary
71/72
73/73
Page
109
109
108
135
167
169
151
141
145
147
150
137
No
30
74
75
39
—
—
—
—
52